1 /*
2  * Marvell 88PM860x Interface
3  *
4  * Copyright (C) 2009 Marvell International Ltd.
5  * 	Haojian Zhuang <haojian.zhuang@marvell.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 
12 #ifndef __LINUX_MFD_88PM860X_H
13 #define __LINUX_MFD_88PM860X_H
14 
15 #include <linux/interrupt.h>
16 
17 #define MFD_NAME_SIZE		(40)
18 
19 enum {
20 	CHIP_INVALID = 0,
21 	CHIP_PM8606,
22 	CHIP_PM8607,
23 	CHIP_MAX,
24 };
25 
26 enum {
27 	PM8606_ID_INVALID,
28 	PM8606_ID_BACKLIGHT,
29 	PM8606_ID_LED,
30 	PM8606_ID_VIBRATOR,
31 	PM8606_ID_TOUCH,
32 	PM8606_ID_SOUND,
33 	PM8606_ID_CHARGER,
34 	PM8606_ID_MAX,
35 };
36 
37 
38 /* 8606 Registers */
39 #define PM8606_DCM_BOOST		(0x00)
40 #define PM8606_PWM			(0x01)
41 
42 #define PM8607_MISC2			(0x42)
43 
44 /* Power Up Log Register */
45 #define PM8607_POWER_UP_LOG		(0x3F)
46 
47 /* Charger Control Registers */
48 #define PM8607_CCNT			(0x47)
49 #define PM8607_CHG_CTRL1		(0x48)
50 #define PM8607_CHG_CTRL2		(0x49)
51 #define PM8607_CHG_CTRL3		(0x4A)
52 #define PM8607_CHG_CTRL4		(0x4B)
53 #define PM8607_CHG_CTRL5		(0x4C)
54 #define PM8607_CHG_CTRL6		(0x4D)
55 #define PM8607_CHG_CTRL7		(0x4E)
56 
57 /* Backlight Registers */
58 #define PM8606_WLED1A			(0x02)
59 #define PM8606_WLED1B			(0x03)
60 #define PM8606_WLED2A			(0x04)
61 #define PM8606_WLED2B			(0x05)
62 #define PM8606_WLED3A			(0x06)
63 #define PM8606_WLED3B			(0x07)
64 
65 /* LED Registers */
66 #define PM8606_RGB2A			(0x08)
67 #define PM8606_RGB2B			(0x09)
68 #define PM8606_RGB2C			(0x0A)
69 #define PM8606_RGB2D			(0x0B)
70 #define PM8606_RGB1A			(0x0C)
71 #define PM8606_RGB1B			(0x0D)
72 #define PM8606_RGB1C			(0x0E)
73 #define PM8606_RGB1D			(0x0F)
74 
75 #define PM8606_PREREGULATORA		(0x10)
76 #define PM8606_PREREGULATORB		(0x11)
77 #define PM8606_VIBRATORA		(0x12)
78 #define PM8606_VIBRATORB		(0x13)
79 #define PM8606_VCHG			(0x14)
80 #define PM8606_VSYS			(0x15)
81 #define PM8606_MISC			(0x16)
82 #define PM8606_CHIP_ID			(0x17)
83 #define PM8606_STATUS			(0x18)
84 #define PM8606_FLAGS			(0x19)
85 #define PM8606_PROTECTA			(0x1A)
86 #define PM8606_PROTECTB			(0x1B)
87 #define PM8606_PROTECTC			(0x1C)
88 
89 /* Bit definitions of PM8606 registers */
90 #define PM8606_DCM_500MA		(0x0)	/* current limit */
91 #define PM8606_DCM_750MA		(0x1)
92 #define PM8606_DCM_1000MA		(0x2)
93 #define PM8606_DCM_1250MA		(0x3)
94 #define PM8606_DCM_250MV		(0x0 << 2)
95 #define PM8606_DCM_300MV		(0x1 << 2)
96 #define PM8606_DCM_350MV		(0x2 << 2)
97 #define PM8606_DCM_400MV		(0x3 << 2)
98 
99 #define PM8606_PWM_31200HZ		(0x0)
100 #define PM8606_PWM_15600HZ		(0x1)
101 #define PM8606_PWM_7800HZ		(0x2)
102 #define PM8606_PWM_3900HZ		(0x3)
103 #define PM8606_PWM_1950HZ		(0x4)
104 #define PM8606_PWM_976HZ		(0x5)
105 #define PM8606_PWM_488HZ		(0x6)
106 #define PM8606_PWM_244HZ		(0x7)
107 #define PM8606_PWM_FREQ_MASK		(0x7)
108 
109 #define PM8606_WLED_ON			(1 << 0)
110 #define PM8606_WLED_CURRENT(x)		((x & 0x1F) << 1)
111 
112 #define PM8606_LED_CURRENT(x)		(((x >> 2) & 0x07) << 5)
113 
114 #define PM8606_VSYS_EN			(1 << 1)
115 
116 #define PM8606_MISC_OSC_EN		(1 << 4)
117 
118 enum {
119 	PM8607_ID_BUCK1 = 0,
120 	PM8607_ID_BUCK2,
121 	PM8607_ID_BUCK3,
122 
123 	PM8607_ID_LDO1,
124 	PM8607_ID_LDO2,
125 	PM8607_ID_LDO3,
126 	PM8607_ID_LDO4,
127 	PM8607_ID_LDO5,
128 	PM8607_ID_LDO6,
129 	PM8607_ID_LDO7,
130 	PM8607_ID_LDO8,
131 	PM8607_ID_LDO9,
132 	PM8607_ID_LDO10,
133 	PM8607_ID_LDO11,
134 	PM8607_ID_LDO12,
135 	PM8607_ID_LDO13,
136 	PM8607_ID_LDO14,
137 	PM8607_ID_LDO15,
138 	PM8606_ID_PREG,
139 
140 	PM8607_ID_RG_MAX,
141 };
142 
143 /* 8607 chip ID is 0x40 or 0x50 */
144 #define PM8607_VERSION_MASK		(0xF0)	/* 8607 chip ID mask */
145 
146 /* Interrupt Registers */
147 #define PM8607_STATUS_1			(0x01)
148 #define PM8607_STATUS_2			(0x02)
149 #define PM8607_INT_STATUS1		(0x03)
150 #define PM8607_INT_STATUS2		(0x04)
151 #define PM8607_INT_STATUS3		(0x05)
152 #define PM8607_INT_MASK_1		(0x06)
153 #define PM8607_INT_MASK_2		(0x07)
154 #define PM8607_INT_MASK_3		(0x08)
155 
156 /* Regulator Control Registers */
157 #define PM8607_LDO1			(0x10)
158 #define PM8607_LDO2			(0x11)
159 #define PM8607_LDO3			(0x12)
160 #define PM8607_LDO4			(0x13)
161 #define PM8607_LDO5			(0x14)
162 #define PM8607_LDO6			(0x15)
163 #define PM8607_LDO7			(0x16)
164 #define PM8607_LDO8			(0x17)
165 #define PM8607_LDO9			(0x18)
166 #define PM8607_LDO10			(0x19)
167 #define PM8607_LDO12			(0x1A)
168 #define PM8607_LDO14			(0x1B)
169 #define PM8607_SLEEP_MODE1		(0x1C)
170 #define PM8607_SLEEP_MODE2		(0x1D)
171 #define PM8607_SLEEP_MODE3		(0x1E)
172 #define PM8607_SLEEP_MODE4		(0x1F)
173 #define PM8607_GO			(0x20)
174 #define PM8607_SLEEP_BUCK1		(0x21)
175 #define PM8607_SLEEP_BUCK2		(0x22)
176 #define PM8607_SLEEP_BUCK3		(0x23)
177 #define PM8607_BUCK1			(0x24)
178 #define PM8607_BUCK2			(0x25)
179 #define PM8607_BUCK3			(0x26)
180 #define PM8607_BUCK_CONTROLS		(0x27)
181 #define PM8607_SUPPLIES_EN11		(0x2B)
182 #define PM8607_SUPPLIES_EN12		(0x2C)
183 #define PM8607_GROUP1			(0x2D)
184 #define PM8607_GROUP2			(0x2E)
185 #define PM8607_GROUP3			(0x2F)
186 #define PM8607_GROUP4			(0x30)
187 #define PM8607_GROUP5			(0x31)
188 #define PM8607_GROUP6			(0x32)
189 #define PM8607_SUPPLIES_EN21		(0x33)
190 #define PM8607_SUPPLIES_EN22		(0x34)
191 
192 /* Vibrator Control Registers */
193 #define PM8607_VIBRATOR_SET		(0x28)
194 #define PM8607_VIBRATOR_PWM		(0x29)
195 
196 /* GPADC Registers */
197 #define PM8607_GP_BIAS1			(0x4F)
198 #define PM8607_MEAS_EN1			(0x50)
199 #define PM8607_MEAS_EN2			(0x51)
200 #define PM8607_MEAS_EN3			(0x52)
201 #define PM8607_MEAS_OFF_TIME1		(0x53)
202 #define PM8607_MEAS_OFF_TIME2		(0x54)
203 #define PM8607_TSI_PREBIAS		(0x55)	/* prebias time */
204 #define PM8607_PD_PREBIAS		(0x56)	/* prebias time */
205 #define PM8607_GPADC_MISC1		(0x57)
206 
207 /* bit definitions of  MEAS_EN1*/
208 #define PM8607_MEAS_EN1_VBAT		(1 << 0)
209 #define PM8607_MEAS_EN1_VCHG		(1 << 1)
210 #define PM8607_MEAS_EN1_VSYS		(1 << 2)
211 #define PM8607_MEAS_EN1_TINT		(1 << 3)
212 #define PM8607_MEAS_EN1_RFTMP		(1 << 4)
213 #define PM8607_MEAS_EN1_TBAT		(1 << 5)
214 #define PM8607_MEAS_EN1_GPADC2		(1 << 6)
215 #define PM8607_MEAS_EN1_GPADC3		(1 << 7)
216 
217 /* Battery Monitor Registers */
218 #define PM8607_GP_BIAS2			(0x5A)
219 #define PM8607_VBAT_LOWTH		(0x5B)
220 #define PM8607_VCHG_LOWTH		(0x5C)
221 #define PM8607_VSYS_LOWTH		(0x5D)
222 #define PM8607_TINT_LOWTH		(0x5E)
223 #define PM8607_GPADC0_LOWTH		(0x5F)
224 #define PM8607_GPADC1_LOWTH		(0x60)
225 #define PM8607_GPADC2_LOWTH		(0x61)
226 #define PM8607_GPADC3_LOWTH		(0x62)
227 #define PM8607_VBAT_HIGHTH		(0x63)
228 #define PM8607_VCHG_HIGHTH		(0x64)
229 #define PM8607_VSYS_HIGHTH		(0x65)
230 #define PM8607_TINT_HIGHTH		(0x66)
231 #define PM8607_GPADC0_HIGHTH		(0x67)
232 #define PM8607_GPADC1_HIGHTH		(0x68)
233 #define PM8607_GPADC2_HIGHTH		(0x69)
234 #define PM8607_GPADC3_HIGHTH		(0x6A)
235 #define PM8607_IBAT_MEAS1		(0x6B)
236 #define PM8607_IBAT_MEAS2		(0x6C)
237 #define PM8607_VBAT_MEAS1		(0x6D)
238 #define PM8607_VBAT_MEAS2		(0x6E)
239 #define PM8607_VCHG_MEAS1		(0x6F)
240 #define PM8607_VCHG_MEAS2		(0x70)
241 #define PM8607_VSYS_MEAS1		(0x71)
242 #define PM8607_VSYS_MEAS2		(0x72)
243 #define PM8607_TINT_MEAS1		(0x73)
244 #define PM8607_TINT_MEAS2		(0x74)
245 #define PM8607_GPADC0_MEAS1		(0x75)
246 #define PM8607_GPADC0_MEAS2		(0x76)
247 #define PM8607_GPADC1_MEAS1		(0x77)
248 #define PM8607_GPADC1_MEAS2		(0x78)
249 #define PM8607_GPADC2_MEAS1		(0x79)
250 #define PM8607_GPADC2_MEAS2		(0x7A)
251 #define PM8607_GPADC3_MEAS1		(0x7B)
252 #define PM8607_GPADC3_MEAS2		(0x7C)
253 #define PM8607_CCNT_MEAS1		(0x95)
254 #define PM8607_CCNT_MEAS2		(0x96)
255 #define PM8607_VBAT_AVG			(0x97)
256 #define PM8607_VCHG_AVG			(0x98)
257 #define PM8607_VSYS_AVG			(0x99)
258 #define PM8607_VBAT_MIN			(0x9A)
259 #define PM8607_VCHG_MIN			(0x9B)
260 #define PM8607_VSYS_MIN			(0x9C)
261 #define PM8607_VBAT_MAX			(0x9D)
262 #define PM8607_VCHG_MAX			(0x9E)
263 #define PM8607_VSYS_MAX			(0x9F)
264 
265 #define PM8607_GPADC_MISC2		(0x59)
266 #define PM8607_GPADC0_GP_BIAS_A0	(1 << 0)
267 #define PM8607_GPADC1_GP_BIAS_A1	(1 << 1)
268 #define PM8607_GPADC2_GP_BIAS_A2	(1 << 2)
269 #define PM8607_GPADC3_GP_BIAS_A3	(1 << 3)
270 #define PM8607_GPADC2_GP_BIAS_OUT2	(1 << 6)
271 
272 /* RTC Control Registers */
273 #define PM8607_RTC1			(0xA0)
274 #define PM8607_RTC_COUNTER1		(0xA1)
275 #define PM8607_RTC_COUNTER2		(0xA2)
276 #define PM8607_RTC_COUNTER3		(0xA3)
277 #define PM8607_RTC_COUNTER4		(0xA4)
278 #define PM8607_RTC_EXPIRE1		(0xA5)
279 #define PM8607_RTC_EXPIRE2		(0xA6)
280 #define PM8607_RTC_EXPIRE3		(0xA7)
281 #define PM8607_RTC_EXPIRE4		(0xA8)
282 #define PM8607_RTC_TRIM1		(0xA9)
283 #define PM8607_RTC_TRIM2		(0xAA)
284 #define PM8607_RTC_TRIM3		(0xAB)
285 #define PM8607_RTC_TRIM4		(0xAC)
286 #define PM8607_RTC_MISC1		(0xAD)
287 #define PM8607_RTC_MISC2		(0xAE)
288 #define PM8607_RTC_MISC3		(0xAF)
289 
290 /* Misc Registers */
291 #define PM8607_CHIP_ID			(0x00)
292 #define PM8607_B0_MISC1			(0x0C)
293 #define PM8607_LDO1			(0x10)
294 #define PM8607_DVC3			(0x26)
295 #define PM8607_A1_MISC1			(0x40)
296 
297 /* bit definitions of Status Query Interface */
298 #define PM8607_STATUS_CC		(1 << 3)
299 #define PM8607_STATUS_PEN		(1 << 4)
300 #define PM8607_STATUS_HEADSET		(1 << 5)
301 #define PM8607_STATUS_HOOK		(1 << 6)
302 #define PM8607_STATUS_MICIN		(1 << 7)
303 #define PM8607_STATUS_ONKEY		(1 << 8)
304 #define PM8607_STATUS_EXTON		(1 << 9)
305 #define PM8607_STATUS_CHG		(1 << 10)
306 #define PM8607_STATUS_BAT		(1 << 11)
307 #define PM8607_STATUS_VBUS		(1 << 12)
308 #define PM8607_STATUS_OV		(1 << 13)
309 
310 /* bit definitions of BUCK3 */
311 #define PM8607_BUCK3_DOUBLE		(1 << 6)
312 
313 /* bit definitions of Misc1 */
314 #define PM8607_A1_MISC1_PI2C		(1 << 0)
315 #define PM8607_B0_MISC1_INV_INT		(1 << 0)
316 #define PM8607_B0_MISC1_INT_CLEAR	(1 << 1)
317 #define PM8607_B0_MISC1_INT_MASK	(1 << 2)
318 #define PM8607_B0_MISC1_PI2C		(1 << 3)
319 #define PM8607_B0_MISC1_RESET		(1 << 6)
320 
321 /* bits definitions of GPADC */
322 #define PM8607_GPADC_EN			(1 << 0)
323 #define PM8607_GPADC_PREBIAS_MASK	(3 << 1)
324 #define PM8607_GPADC_SLOT_CYCLE_MASK	(3 << 3)	/* slow mode */
325 #define PM8607_GPADC_OFF_SCALE_MASK	(3 << 5)	/* GP sleep mode */
326 #define PM8607_GPADC_SW_CAL_MASK	(1 << 7)
327 
328 #define PM8607_PD_PREBIAS_MASK		(0x1F << 0)
329 #define PM8607_PD_PRECHG_MASK		(7 << 5)
330 
331 #define PM8606_REF_GP_OSC_OFF         0
332 #define PM8606_REF_GP_OSC_ON          1
333 #define PM8606_REF_GP_OSC_UNKNOWN     2
334 
335 /* Clients of reference group and 8MHz oscillator in 88PM8606 */
336 enum pm8606_ref_gp_and_osc_clients {
337 	REF_GP_NO_CLIENTS       = 0,
338 	WLED1_DUTY              = (1<<0), /*PF 0x02.7:0*/
339 	WLED2_DUTY              = (1<<1), /*PF 0x04.7:0*/
340 	WLED3_DUTY              = (1<<2), /*PF 0x06.7:0*/
341 	RGB1_ENABLE             = (1<<3), /*PF 0x07.1*/
342 	RGB2_ENABLE             = (1<<4), /*PF 0x07.2*/
343 	LDO_VBR_EN              = (1<<5), /*PF 0x12.0*/
344 	REF_GP_MAX_CLIENT       = 0xFFFF
345 };
346 
347 /* Interrupt Number in 88PM8607 */
348 enum {
349 	PM8607_IRQ_ONKEY,
350 	PM8607_IRQ_EXTON,
351 	PM8607_IRQ_CHG,
352 	PM8607_IRQ_BAT,
353 	PM8607_IRQ_RTC,
354 	PM8607_IRQ_CC,
355 	PM8607_IRQ_VBAT,
356 	PM8607_IRQ_VCHG,
357 	PM8607_IRQ_VSYS,
358 	PM8607_IRQ_TINT,
359 	PM8607_IRQ_GPADC0,
360 	PM8607_IRQ_GPADC1,
361 	PM8607_IRQ_GPADC2,
362 	PM8607_IRQ_GPADC3,
363 	PM8607_IRQ_AUDIO_SHORT,
364 	PM8607_IRQ_PEN,
365 	PM8607_IRQ_HEADSET,
366 	PM8607_IRQ_HOOK,
367 	PM8607_IRQ_MICIN,
368 	PM8607_IRQ_CHG_FAIL,
369 	PM8607_IRQ_CHG_DONE,
370 	PM8607_IRQ_CHG_FAULT,
371 };
372 
373 enum {
374 	PM8607_CHIP_A0 = 0x40,
375 	PM8607_CHIP_A1 = 0x41,
376 	PM8607_CHIP_B0 = 0x48,
377 };
378 
379 struct pm860x_chip {
380 	struct device		*dev;
381 	struct mutex		irq_lock;
382 	struct mutex		osc_lock;
383 	struct i2c_client	*client;
384 	struct i2c_client	*companion;	/* companion chip client */
385 	struct regmap           *regmap;
386 	struct regmap           *regmap_companion;
387 
388 	int			buck3_double;	/* DVC ramp slope double */
389 	int			companion_addr;
390 	unsigned short		osc_vote;
391 	int			id;
392 	int			irq_mode;
393 	int			irq_base;
394 	int			core_irq;
395 	unsigned char		chip_version;
396 	unsigned char		osc_status;
397 
398 	unsigned int            wakeup_flag;
399 };
400 
401 enum {
402 	GI2C_PORT = 0,
403 	PI2C_PORT,
404 };
405 
406 struct pm860x_backlight_pdata {
407 	int		pwm;
408 	int		iset;
409 };
410 
411 struct pm860x_led_pdata {
412 	int		iset;
413 };
414 
415 struct pm860x_rtc_pdata {
416 	int		(*sync)(unsigned int ticks);
417 	int		vrtc;
418 };
419 
420 struct pm860x_touch_pdata {
421 	int		gpadc_prebias;
422 	int		slot_cycle;
423 	int		off_scale;
424 	int		sw_cal;
425 	int		tsi_prebias;	/* time, slot */
426 	int		pen_prebias;	/* time, slot */
427 	int		pen_prechg;	/* time, slot */
428 	int		res_x;		/* resistor of Xplate */
429 	unsigned long	flags;
430 };
431 
432 struct pm860x_power_pdata {
433 	int		max_capacity;
434 	int		resistor;
435 };
436 
437 struct pm860x_platform_data {
438 	struct pm860x_backlight_pdata	*backlight;
439 	struct pm860x_led_pdata		*led;
440 	struct pm860x_rtc_pdata		*rtc;
441 	struct pm860x_touch_pdata	*touch;
442 	struct pm860x_power_pdata	*power;
443 	struct regulator_init_data	*buck1;
444 	struct regulator_init_data	*buck2;
445 	struct regulator_init_data	*buck3;
446 	struct regulator_init_data	*ldo1;
447 	struct regulator_init_data	*ldo2;
448 	struct regulator_init_data	*ldo3;
449 	struct regulator_init_data	*ldo4;
450 	struct regulator_init_data	*ldo5;
451 	struct regulator_init_data	*ldo6;
452 	struct regulator_init_data	*ldo7;
453 	struct regulator_init_data	*ldo8;
454 	struct regulator_init_data	*ldo9;
455 	struct regulator_init_data	*ldo10;
456 	struct regulator_init_data	*ldo12;
457 	struct regulator_init_data	*ldo_vibrator;
458 	struct regulator_init_data	*ldo14;
459 	struct charger_desc		*chg_desc;
460 
461 	int 		companion_addr;	/* I2C address of companion chip */
462 	int		i2c_port;	/* Controlled by GI2C or PI2C */
463 	int		irq_mode;	/* Clear interrupt by read/write(0/1) */
464 	int		irq_base;	/* IRQ base number of 88pm860x */
465 	int		num_leds;
466 	int		num_backlights;
467 };
468 
469 extern int pm8606_osc_enable(struct pm860x_chip *, unsigned short);
470 extern int pm8606_osc_disable(struct pm860x_chip *, unsigned short);
471 
472 extern int pm860x_reg_read(struct i2c_client *, int);
473 extern int pm860x_reg_write(struct i2c_client *, int, unsigned char);
474 extern int pm860x_bulk_read(struct i2c_client *, int, int, unsigned char *);
475 extern int pm860x_bulk_write(struct i2c_client *, int, int, unsigned char *);
476 extern int pm860x_set_bits(struct i2c_client *, int, unsigned char,
477 			   unsigned char);
478 extern int pm860x_page_reg_read(struct i2c_client *, int);
479 extern int pm860x_page_reg_write(struct i2c_client *, int, unsigned char);
480 extern int pm860x_page_bulk_read(struct i2c_client *, int, int,
481 				 unsigned char *);
482 extern int pm860x_page_bulk_write(struct i2c_client *, int, int,
483 				  unsigned char *);
484 extern int pm860x_page_set_bits(struct i2c_client *, int, unsigned char,
485 				unsigned char);
486 
487 #endif /* __LINUX_MFD_88PM860X_H */
488