1 /*
2 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #ifndef _ASM_X86_AMD_IOMMU_H
21 #define _ASM_X86_AMD_IOMMU_H
22
23 #include <linux/types.h>
24
25 /*
26 * This is mainly used to communicate information back-and-forth
27 * between SVM and IOMMU for setting up and tearing down posted
28 * interrupt
29 */
30 struct amd_iommu_pi_data {
31 u32 ga_tag;
32 u32 prev_ga_tag;
33 u64 base;
34 bool is_guest_mode;
35 struct vcpu_data *vcpu_data;
36 void *ir_data;
37 };
38
39 #ifdef CONFIG_AMD_IOMMU
40
41 struct task_struct;
42 struct pci_dev;
43
44 extern int amd_iommu_detect(void);
45 extern int amd_iommu_init_hardware(void);
46
47 /**
48 * amd_iommu_enable_device_erratum() - Enable erratum workaround for device
49 * in the IOMMUv2 driver
50 * @pdev: The PCI device the workaround is necessary for
51 * @erratum: The erratum workaround to enable
52 *
53 * The function needs to be called before amd_iommu_init_device().
54 * Possible values for the erratum number are for now:
55 * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
56 * is enabled
57 * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
58 * requests to one
59 */
60 #define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
61 #define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
62
63 extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
64
65 /**
66 * amd_iommu_init_device() - Init device for use with IOMMUv2 driver
67 * @pdev: The PCI device to initialize
68 * @pasids: Number of PASIDs to support for this device
69 *
70 * This function does all setup for the device pdev so that it can be
71 * used with IOMMUv2.
72 * Returns 0 on success or negative value on error.
73 */
74 extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
75
76 /**
77 * amd_iommu_free_device() - Free all IOMMUv2 related device resources
78 * and disable IOMMUv2 usage for this device
79 * @pdev: The PCI device to disable IOMMUv2 usage for'
80 */
81 extern void amd_iommu_free_device(struct pci_dev *pdev);
82
83 /**
84 * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
85 * @pdev: The PCI device to bind the task to
86 * @pasid: The PASID on the device the task should be bound to
87 * @task: the task to bind
88 *
89 * The function returns 0 on success or a negative value on error.
90 */
91 extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
92 struct task_struct *task);
93
94 /**
95 * amd_iommu_unbind_pasid() - Unbind a PASID from its task on
96 * a device
97 * @pdev: The device of the PASID
98 * @pasid: The PASID to unbind
99 *
100 * When this function returns the device is no longer using the PASID
101 * and the PASID is no longer bound to its task.
102 */
103 extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
104
105 /**
106 * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
107 * PRI requests
108 * @pdev: The PCI device the call-back should be registered for
109 * @cb: The call-back function
110 *
111 * The IOMMUv2 driver invokes this call-back when it is unable to
112 * successfully handle a PRI request. The device driver can then decide
113 * which PRI response the device should see. Possible return values for
114 * the call-back are:
115 *
116 * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
117 * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
118 * - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
119 * the device is required to disable
120 * PRI when it receives this response
121 *
122 * The function returns 0 on success or negative value on error.
123 */
124 #define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
125 #define AMD_IOMMU_INV_PRI_RSP_INVALID 1
126 #define AMD_IOMMU_INV_PRI_RSP_FAIL 2
127
128 typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
129 int pasid,
130 unsigned long address,
131 u16);
132
133 extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
134 amd_iommu_invalid_ppr_cb cb);
135
136 #define PPR_FAULT_EXEC (1 << 1)
137 #define PPR_FAULT_READ (1 << 2)
138 #define PPR_FAULT_WRITE (1 << 5)
139 #define PPR_FAULT_USER (1 << 6)
140 #define PPR_FAULT_RSVD (1 << 7)
141 #define PPR_FAULT_GN (1 << 8)
142
143 /**
144 * amd_iommu_device_info() - Get information about IOMMUv2 support of a
145 * PCI device
146 * @pdev: PCI device to query information from
147 * @info: A pointer to an amd_iommu_device_info structure which will contain
148 * the information about the PCI device
149 *
150 * Returns 0 on success, negative value on error
151 */
152
153 #define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */
154 #define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */
155 #define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */
156 #define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution
157 on memory pages */
158 #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request
159 super-user privileges */
160
161 struct amd_iommu_device_info {
162 int max_pasids;
163 u32 flags;
164 };
165
166 extern int amd_iommu_device_info(struct pci_dev *pdev,
167 struct amd_iommu_device_info *info);
168
169 /**
170 * amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
171 * a pasid context. This call-back is
172 * invoked when the IOMMUv2 driver needs to
173 * invalidate a PASID context, for example
174 * because the task that is bound to that
175 * context is about to exit.
176 *
177 * @pdev: The PCI device the call-back should be registered for
178 * @cb: The call-back function
179 */
180
181 typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);
182
183 extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
184 amd_iommu_invalidate_ctx cb);
185 #else /* CONFIG_AMD_IOMMU */
186
amd_iommu_detect(void)187 static inline int amd_iommu_detect(void) { return -ENODEV; }
188
189 #endif /* CONFIG_AMD_IOMMU */
190
191 #if defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP)
192
193 /* IOMMU AVIC Function */
194 extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
195
196 extern int
197 amd_iommu_update_ga(int cpu, bool is_run, void *data);
198
199 #else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
200
201 static inline int
amd_iommu_register_ga_log_notifier(int (* notifier)(u32))202 amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
203 {
204 return 0;
205 }
206
207 static inline int
amd_iommu_update_ga(int cpu,bool is_run,void * data)208 amd_iommu_update_ga(int cpu, bool is_run, void *data)
209 {
210 return 0;
211 }
212
213 #endif /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
214
215 #endif /* _ASM_X86_AMD_IOMMU_H */
216