1 /* s5m8767.h 2 * 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd 4 * http://www.samsung.com 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 * 11 */ 12 13 #ifndef __LINUX_MFD_S5M8767_H 14 #define __LINUX_MFD_S5M8767_H 15 16 /* S5M8767 registers */ 17 enum s5m8767_reg { 18 S5M8767_REG_ID, 19 S5M8767_REG_INT1, 20 S5M8767_REG_INT2, 21 S5M8767_REG_INT3, 22 S5M8767_REG_INT1M, 23 S5M8767_REG_INT2M, 24 S5M8767_REG_INT3M, 25 S5M8767_REG_STATUS1, 26 S5M8767_REG_STATUS2, 27 S5M8767_REG_STATUS3, 28 S5M8767_REG_CTRL1, 29 S5M8767_REG_CTRL2, 30 S5M8767_REG_LOWBAT1, 31 S5M8767_REG_LOWBAT2, 32 S5M8767_REG_BUCHG, 33 S5M8767_REG_DVSRAMP, 34 S5M8767_REG_DVSTIMER2 = 0x10, 35 S5M8767_REG_DVSTIMER3, 36 S5M8767_REG_DVSTIMER4, 37 S5M8767_REG_LDO1, 38 S5M8767_REG_LDO2, 39 S5M8767_REG_LDO3, 40 S5M8767_REG_LDO4, 41 S5M8767_REG_LDO5, 42 S5M8767_REG_LDO6, 43 S5M8767_REG_LDO7, 44 S5M8767_REG_LDO8, 45 S5M8767_REG_LDO9, 46 S5M8767_REG_LDO10, 47 S5M8767_REG_LDO11, 48 S5M8767_REG_LDO12, 49 S5M8767_REG_LDO13, 50 S5M8767_REG_LDO14 = 0x20, 51 S5M8767_REG_LDO15, 52 S5M8767_REG_LDO16, 53 S5M8767_REG_LDO17, 54 S5M8767_REG_LDO18, 55 S5M8767_REG_LDO19, 56 S5M8767_REG_LDO20, 57 S5M8767_REG_LDO21, 58 S5M8767_REG_LDO22, 59 S5M8767_REG_LDO23, 60 S5M8767_REG_LDO24, 61 S5M8767_REG_LDO25, 62 S5M8767_REG_LDO26, 63 S5M8767_REG_LDO27, 64 S5M8767_REG_LDO28, 65 S5M8767_REG_UVLO = 0x31, 66 S5M8767_REG_BUCK1CTRL1, 67 S5M8767_REG_BUCK1CTRL2, 68 S5M8767_REG_BUCK2CTRL, 69 S5M8767_REG_BUCK2DVS1, 70 S5M8767_REG_BUCK2DVS2, 71 S5M8767_REG_BUCK2DVS3, 72 S5M8767_REG_BUCK2DVS4, 73 S5M8767_REG_BUCK2DVS5, 74 S5M8767_REG_BUCK2DVS6, 75 S5M8767_REG_BUCK2DVS7, 76 S5M8767_REG_BUCK2DVS8, 77 S5M8767_REG_BUCK3CTRL, 78 S5M8767_REG_BUCK3DVS1, 79 S5M8767_REG_BUCK3DVS2, 80 S5M8767_REG_BUCK3DVS3, 81 S5M8767_REG_BUCK3DVS4, 82 S5M8767_REG_BUCK3DVS5, 83 S5M8767_REG_BUCK3DVS6, 84 S5M8767_REG_BUCK3DVS7, 85 S5M8767_REG_BUCK3DVS8, 86 S5M8767_REG_BUCK4CTRL, 87 S5M8767_REG_BUCK4DVS1, 88 S5M8767_REG_BUCK4DVS2, 89 S5M8767_REG_BUCK4DVS3, 90 S5M8767_REG_BUCK4DVS4, 91 S5M8767_REG_BUCK4DVS5, 92 S5M8767_REG_BUCK4DVS6, 93 S5M8767_REG_BUCK4DVS7, 94 S5M8767_REG_BUCK4DVS8, 95 S5M8767_REG_BUCK5CTRL1, 96 S5M8767_REG_BUCK5CTRL2, 97 S5M8767_REG_BUCK5CTRL3, 98 S5M8767_REG_BUCK5CTRL4, 99 S5M8767_REG_BUCK5CTRL5, 100 S5M8767_REG_BUCK6CTRL1, 101 S5M8767_REG_BUCK6CTRL2, 102 S5M8767_REG_BUCK7CTRL1, 103 S5M8767_REG_BUCK7CTRL2, 104 S5M8767_REG_BUCK8CTRL1, 105 S5M8767_REG_BUCK8CTRL2, 106 S5M8767_REG_BUCK9CTRL1, 107 S5M8767_REG_BUCK9CTRL2, 108 S5M8767_REG_LDO1CTRL, 109 S5M8767_REG_LDO2_1CTRL, 110 S5M8767_REG_LDO2_2CTRL, 111 S5M8767_REG_LDO2_3CTRL, 112 S5M8767_REG_LDO2_4CTRL, 113 S5M8767_REG_LDO3CTRL, 114 S5M8767_REG_LDO4CTRL, 115 S5M8767_REG_LDO5CTRL, 116 S5M8767_REG_LDO6CTRL, 117 S5M8767_REG_LDO7CTRL, 118 S5M8767_REG_LDO8CTRL, 119 S5M8767_REG_LDO9CTRL, 120 S5M8767_REG_LDO10CTRL, 121 S5M8767_REG_LDO11CTRL, 122 S5M8767_REG_LDO12CTRL, 123 S5M8767_REG_LDO13CTRL, 124 S5M8767_REG_LDO14CTRL, 125 S5M8767_REG_LDO15CTRL, 126 S5M8767_REG_LDO16CTRL, 127 S5M8767_REG_LDO17CTRL, 128 S5M8767_REG_LDO18CTRL, 129 S5M8767_REG_LDO19CTRL, 130 S5M8767_REG_LDO20CTRL, 131 S5M8767_REG_LDO21CTRL, 132 S5M8767_REG_LDO22CTRL, 133 S5M8767_REG_LDO23CTRL, 134 S5M8767_REG_LDO24CTRL, 135 S5M8767_REG_LDO25CTRL, 136 S5M8767_REG_LDO26CTRL, 137 S5M8767_REG_LDO27CTRL, 138 S5M8767_REG_LDO28CTRL, 139 }; 140 141 /* S5M8767 regulator ids */ 142 enum s5m8767_regulators { 143 S5M8767_LDO1, 144 S5M8767_LDO2, 145 S5M8767_LDO3, 146 S5M8767_LDO4, 147 S5M8767_LDO5, 148 S5M8767_LDO6, 149 S5M8767_LDO7, 150 S5M8767_LDO8, 151 S5M8767_LDO9, 152 S5M8767_LDO10, 153 S5M8767_LDO11, 154 S5M8767_LDO12, 155 S5M8767_LDO13, 156 S5M8767_LDO14, 157 S5M8767_LDO15, 158 S5M8767_LDO16, 159 S5M8767_LDO17, 160 S5M8767_LDO18, 161 S5M8767_LDO19, 162 S5M8767_LDO20, 163 S5M8767_LDO21, 164 S5M8767_LDO22, 165 S5M8767_LDO23, 166 S5M8767_LDO24, 167 S5M8767_LDO25, 168 S5M8767_LDO26, 169 S5M8767_LDO27, 170 S5M8767_LDO28, 171 S5M8767_BUCK1, 172 S5M8767_BUCK2, 173 S5M8767_BUCK3, 174 S5M8767_BUCK4, 175 S5M8767_BUCK5, 176 S5M8767_BUCK6, 177 S5M8767_BUCK7, 178 S5M8767_BUCK8, 179 S5M8767_BUCK9, 180 S5M8767_AP_EN32KHZ, 181 S5M8767_CP_EN32KHZ, 182 183 S5M8767_REG_MAX, 184 }; 185 186 /* LDO_EN/BUCK_EN field in registers */ 187 #define S5M8767_ENCTRL_SHIFT 6 188 #define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT) 189 190 /* 191 * LDO_EN/BUCK_EN register value for controlling this Buck or LDO 192 * by GPIO (PWREN, BUCKEN). 193 */ 194 #define S5M8767_ENCTRL_USE_GPIO 0x1 195 196 /* 197 * Values for BUCK_RAMP field in DVS_RAMP register, matching raw values 198 * in mV/us. 199 */ 200 enum s5m8767_dvs_buck_ramp_values { 201 S5M8767_DVS_BUCK_RAMP_5 = 0x4, 202 S5M8767_DVS_BUCK_RAMP_10 = 0x9, 203 S5M8767_DVS_BUCK_RAMP_12_5 = 0xb, 204 S5M8767_DVS_BUCK_RAMP_25 = 0xd, 205 S5M8767_DVS_BUCK_RAMP_50 = 0xe, 206 S5M8767_DVS_BUCK_RAMP_100 = 0xf, 207 }; 208 #define S5M8767_DVS_BUCK_RAMP_SHIFT 4 209 #define S5M8767_DVS_BUCK_RAMP_MASK (0xf << S5M8767_DVS_BUCK_RAMP_SHIFT) 210 211 #endif /* __LINUX_MFD_S5M8767_H */ 212