Searched refs:SIRFSOC_CLKC_PLL1_CFG0 (Results 1 – 3 of 3) sorted by relevance
14 #define SIRFSOC_CLKC_PLL1_CFG0 0x0040 macro
20 #define SIRFSOC_CLKC_PLL1_CFG0 0x0080 macro
80 SIRFSOC_CLKC_PLL1_CFG0; in pll_clk_recalc_rate()153 reg = clk->regofs + SIRFSOC_CLKC_PLL1_CFG1 - SIRFSOC_CLKC_PLL1_CFG0; in pll_clk_set_rate()156 reg = clk->regofs + SIRFSOC_CLKC_PLL1_CFG2 - SIRFSOC_CLKC_PLL1_CFG0; in pll_clk_set_rate()219 .regofs = SIRFSOC_CLKC_PLL1_CFG0,