Searched refs:SOCFPGA_PLL_DIVQ_SHIFT (Results 1 – 2 of 2) sorted by relevance
35 #define SOCFPGA_PLL_DIVQ_SHIFT 16 macro55 divq = (reg & SOCFPGA_PLL_DIVQ_MASK) >> SOCFPGA_PLL_DIVQ_SHIFT; in clk_pll_recalc_rate()
39 #define SOCFPGA_PLL_DIVQ_SHIFT 16 macro62 divq = (reg & SOCFPGA_PLL_DIVQ_MASK) >> SOCFPGA_PLL_DIVQ_SHIFT; in clk_pll_recalc_rate()