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Searched refs:SYSMGR_SDMMC_CTRL_SET_AS10 (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/drivers/clk/socfpga/
Dclk.h35 #define SYSMGR_SDMMC_CTRL_SET_AS10(smplsel, drvsel) \ macro
Dclk-gate-a10.c89 hs_timing = SYSMGR_SDMMC_CTRL_SET_AS10(clk_phase[0], clk_phase[1]); in socfpga_clk_prepare()