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Searched refs:SYS_CLK_UART0 (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/include/dt-bindings/clock/
Dpistachio-clk.h161 #define SYS_CLK_UART0 10 macro
/linux-4.19.296/drivers/clk/pistachio/
Dclk-pistachio.c288 GATE(SYS_CLK_UART0, "uart0_sys", "sys", 0x8, 10),