Searched refs:TEGRA114_CLK_XUSB_SS_DIV2 (Results 1 – 2 of 2) sorted by relevance
341 #define TEGRA114_CLK_XUSB_SS_DIV2 311 macro
800 [tegra_clk_xusb_ss_div2] = { .dt_id = TEGRA114_CLK_XUSB_SS_DIV2, .present = true},1052 clks[TEGRA114_CLK_XUSB_SS_DIV2] = clk; in tegra114_periph_clk_init()1189 { TEGRA114_CLK_XUSB_HS_SRC, TEGRA114_CLK_XUSB_SS_DIV2, 61200000, 0 },