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Searched refs:TEGRA20_CLK_PLL_P (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/drivers/clk/tegra/
Dclk-tegra20.c431 { .con_id = "pll_p", .dt_id = TEGRA20_CLK_PLL_P },
560 [tegra_clk_pll_p] = { .dt_id = TEGRA20_CLK_PLL_P, .present = true },
1043 { TEGRA20_CLK_PLL_P, TEGRA20_CLK_CLK_MAX, 216000000, 1 },
1055 { TEGRA20_CLK_UARTA, TEGRA20_CLK_PLL_P, 0, 0 },
1056 { TEGRA20_CLK_UARTB, TEGRA20_CLK_PLL_P, 0, 0 },
1057 { TEGRA20_CLK_UARTC, TEGRA20_CLK_PLL_P, 0, 0 },
1058 { TEGRA20_CLK_UARTD, TEGRA20_CLK_PLL_P, 0, 0 },
1059 { TEGRA20_CLK_UARTE, TEGRA20_CLK_PLL_P, 0, 0 },
1066 { TEGRA20_CLK_SDMMC1, TEGRA20_CLK_PLL_P, 48000000, 0 },
1067 { TEGRA20_CLK_SDMMC3, TEGRA20_CLK_PLL_P, 48000000, 0 },
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/linux-4.19.296/include/dt-bindings/clock/
Dtegra20-car.h144 #define TEGRA20_CLK_PLL_P 121 macro