Searched refs:UTMIP_PLL_CFG1_ENABLE_DLY_COUNT (Results 1 – 2 of 2) sorted by relevance
196 #define UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 27) macro1133 value &= ~UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(~0); in clk_pllu_enable()1134 value |= UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(params->enable_delay_count); in clk_pllu_enable()1751 value &= ~UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(~0); in clk_pllu_tegra114_enable()1752 value |= UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(params->enable_delay_count); in clk_pllu_tegra114_enable()
179 #define UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 27) macro2774 reg &= ~UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(~0); in tegra210_utmi_param_configure()2776 UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(utmi_parameters[i].enable_delay_count); in tegra210_utmi_param_configure()