Searched refs:VF610_CLK_ESDHC0_DIV (Results 1 – 2 of 2) sorted by relevance
92 #define VF610_CLK_ESDHC0_DIV 79 macro
340 clk[VF610_CLK_ESDHC0_DIV] = imx_clk_divider("esdhc0_div", "esdhc0_en", CCM_CSCDR2, 16, 4); in vf610_clocks_init()