1 /*
2  * GPIO driver for EXAR XRA1403 16-bit GPIO expander
3  *
4  * Copyright (c) 2017, General Electric Company
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #include <linux/bitops.h>
20 #include <linux/gpio/driver.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/mutex.h>
24 #include <linux/of_device.h>
25 #include <linux/of_gpio.h>
26 #include <linux/seq_file.h>
27 #include <linux/spi/spi.h>
28 #include <linux/regmap.h>
29 
30 /* XRA1403 registers */
31 #define XRA_GSR   0x00 /* GPIO State */
32 #define XRA_OCR   0x02 /* Output Control */
33 #define XRA_PIR   0x04 /* Input Polarity Inversion */
34 #define XRA_GCR   0x06 /* GPIO Configuration */
35 #define XRA_PUR   0x08 /* Input Internal Pull-up Resistor Enable/Disable */
36 #define XRA_IER   0x0A /* Input Interrupt Enable */
37 #define XRA_TSCR  0x0C /* Output Three-State Control */
38 #define XRA_ISR   0x0E /* Input Interrupt Status */
39 #define XRA_REIR  0x10 /* Input Rising Edge Interrupt Enable */
40 #define XRA_FEIR  0x12 /* Input Falling Edge Interrupt Enable */
41 #define XRA_IFR   0x14 /* Input Filter Enable/Disable */
42 #define XRA_LAST  0x15 /* Bounds */
43 
44 struct xra1403 {
45 	struct gpio_chip  chip;
46 	struct regmap     *regmap;
47 };
48 
49 static const struct regmap_config xra1403_regmap_cfg = {
50 		.reg_bits = 7,
51 		.pad_bits = 1,
52 		.val_bits = 8,
53 
54 		.max_register = XRA_LAST,
55 };
56 
to_reg(unsigned int reg,unsigned int offset)57 static unsigned int to_reg(unsigned int reg, unsigned int offset)
58 {
59 	return reg + (offset > 7);
60 }
61 
xra1403_direction_input(struct gpio_chip * chip,unsigned int offset)62 static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
63 {
64 	struct xra1403 *xra = gpiochip_get_data(chip);
65 
66 	return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
67 			BIT(offset % 8), BIT(offset % 8));
68 }
69 
xra1403_direction_output(struct gpio_chip * chip,unsigned int offset,int value)70 static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
71 				    int value)
72 {
73 	int ret;
74 	struct xra1403 *xra = gpiochip_get_data(chip);
75 
76 	ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
77 			BIT(offset % 8), 0);
78 	if (ret)
79 		return ret;
80 
81 	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
82 			BIT(offset % 8), value ? BIT(offset % 8) : 0);
83 
84 	return ret;
85 }
86 
xra1403_get_direction(struct gpio_chip * chip,unsigned int offset)87 static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
88 {
89 	int ret;
90 	unsigned int val;
91 	struct xra1403 *xra = gpiochip_get_data(chip);
92 
93 	ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
94 	if (ret)
95 		return ret;
96 
97 	return !!(val & BIT(offset % 8));
98 }
99 
xra1403_get(struct gpio_chip * chip,unsigned int offset)100 static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
101 {
102 	int ret;
103 	unsigned int val;
104 	struct xra1403 *xra = gpiochip_get_data(chip);
105 
106 	ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
107 	if (ret)
108 		return ret;
109 
110 	return !!(val & BIT(offset % 8));
111 }
112 
xra1403_set(struct gpio_chip * chip,unsigned int offset,int value)113 static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
114 {
115 	int ret;
116 	struct xra1403 *xra = gpiochip_get_data(chip);
117 
118 	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
119 			BIT(offset % 8), value ? BIT(offset % 8) : 0);
120 	if (ret)
121 		dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
122 				offset, ret);
123 }
124 
125 #ifdef CONFIG_DEBUG_FS
xra1403_dbg_show(struct seq_file * s,struct gpio_chip * chip)126 static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
127 {
128 	int reg;
129 	struct xra1403 *xra = gpiochip_get_data(chip);
130 	int value[XRA_LAST];
131 	int i;
132 	unsigned int gcr;
133 	unsigned int gsr;
134 
135 	seq_puts(s, "xra reg:");
136 	for (reg = 0; reg <= XRA_LAST; reg++)
137 		seq_printf(s, " %2.2x", reg);
138 	seq_puts(s, "\n  value:");
139 	for (reg = 0; reg < XRA_LAST; reg++) {
140 		regmap_read(xra->regmap, reg, &value[reg]);
141 		seq_printf(s, " %2.2x", value[reg]);
142 	}
143 	seq_puts(s, "\n");
144 
145 	gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
146 	gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
147 	for (i = 0; i < chip->ngpio; i++) {
148 		const char *label = gpiochip_is_requested(chip, i);
149 
150 		if (!label)
151 			continue;
152 
153 		seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
154 			   chip->base + i, label,
155 			   (gcr & BIT(i)) ? "in" : "out",
156 			   (gsr & BIT(i)) ? "hi" : "lo");
157 	}
158 }
159 #else
160 #define xra1403_dbg_show NULL
161 #endif
162 
xra1403_probe(struct spi_device * spi)163 static int xra1403_probe(struct spi_device *spi)
164 {
165 	struct xra1403 *xra;
166 	struct gpio_desc *reset_gpio;
167 	int ret;
168 
169 	xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
170 	if (!xra)
171 		return -ENOMEM;
172 
173 	/* bring the chip out of reset if reset pin is provided*/
174 	reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
175 	if (IS_ERR(reset_gpio))
176 		dev_warn(&spi->dev, "Could not get reset-gpios\n");
177 
178 	xra->chip.direction_input = xra1403_direction_input;
179 	xra->chip.direction_output = xra1403_direction_output;
180 	xra->chip.get_direction = xra1403_get_direction;
181 	xra->chip.get = xra1403_get;
182 	xra->chip.set = xra1403_set;
183 
184 	xra->chip.dbg_show = xra1403_dbg_show;
185 
186 	xra->chip.ngpio = 16;
187 	xra->chip.label = "xra1403";
188 
189 	xra->chip.base = -1;
190 	xra->chip.can_sleep = true;
191 	xra->chip.parent = &spi->dev;
192 	xra->chip.owner = THIS_MODULE;
193 
194 	xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
195 	if (IS_ERR(xra->regmap)) {
196 		ret = PTR_ERR(xra->regmap);
197 		dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
198 		return ret;
199 	}
200 
201 	ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
202 	if (ret < 0) {
203 		dev_err(&spi->dev, "Unable to register gpiochip\n");
204 		return ret;
205 	}
206 
207 	spi_set_drvdata(spi, xra);
208 
209 	return 0;
210 }
211 
212 static const struct spi_device_id xra1403_ids[] = {
213 	{ "xra1403" },
214 	{},
215 };
216 MODULE_DEVICE_TABLE(spi, xra1403_ids);
217 
218 static const struct of_device_id xra1403_spi_of_match[] = {
219 	{ .compatible = "exar,xra1403" },
220 	{},
221 };
222 MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
223 
224 static struct spi_driver xra1403_driver = {
225 	.probe    = xra1403_probe,
226 	.id_table = xra1403_ids,
227 	.driver   = {
228 		.name           = "xra1403",
229 		.of_match_table = of_match_ptr(xra1403_spi_of_match),
230 	},
231 };
232 
233 module_spi_driver(xra1403_driver);
234 
235 MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
236 MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
237 MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
238 MODULE_LICENSE("GPL v2");
239