Searched refs:__aligned_u64 (Results 1 – 25 of 32) sorted by relevance
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82 __aligned_u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */101 __aligned_u64 vaddr;103 __aligned_u64 tidlist;134 __aligned_u64 sc_credits_addr;139 __aligned_u64 pio_bufbase_sop;144 __aligned_u64 pio_bufbase;146 __aligned_u64 rcvhdr_bufbase;148 __aligned_u64 rcvegr_bufbase;150 __aligned_u64 sdma_comp_bufbase;158 __aligned_u64 user_regbase;[all …]
180 __aligned_u64 dev; /* device/hw status bits */181 __aligned_u64 port; /* port state and status bits */
58 __aligned_u64 key;59 __aligned_u64 gts_key;60 __aligned_u64 memsize;73 __aligned_u64 ma_sync_key;74 __aligned_u64 sq_key;75 __aligned_u64 rq_key;76 __aligned_u64 sq_db_gts_key;77 __aligned_u64 rq_db_gts_key;78 __aligned_u64 sq_memsize;79 __aligned_u64 rq_memsize;[all …]
147 __aligned_u64 buf_addr;158 __aligned_u64 buf_addr;164 __aligned_u64 buf_addr;175 __aligned_u64 rbuf_addr;176 __aligned_u64 sbuf_addr;179 __aligned_u64 qp_addr;184 __aligned_u64 swap_val;185 __aligned_u64 compare_val;186 __aligned_u64 swap_mask;187 __aligned_u64 compare_mask;[all …]
120 __aligned_u64 element;126 __aligned_u64 cq_handle;153 __aligned_u64 response;160 __aligned_u64 response;161 __aligned_u64 driver_data[0];170 __aligned_u64 response;171 __aligned_u64 driver_data[0];175 __aligned_u64 fw_ver;178 __aligned_u64 max_mr_size;179 __aligned_u64 page_size_cap;[all …]
58 __aligned_u64 ah_tbl_page;63 __aligned_u64 rsvd1;64 __aligned_u64 rsvd2;90 __aligned_u64 page_addr[MAX_CQ_PAGES];91 __aligned_u64 db_page_addr;95 __aligned_u64 rsvd1;96 __aligned_u64 rsvd2;118 __aligned_u64 sq_page_addr[MAX_QP_PAGES];119 __aligned_u64 rq_page_addr[MAX_QP_PAGES];120 __aligned_u64 db_page_addr;[all …]
76 __aligned_u64 uid;77 __aligned_u64 response;85 __aligned_u64 response;95 __aligned_u64 response;108 __aligned_u64 response;126 __aligned_u64 data;138 __aligned_u64 data;139 __aligned_u64 primary_path;140 __aligned_u64 alternate_path;156 __aligned_u64 uid;[all …]
43 __aligned_u64 db_pa;60 __aligned_u64 rsvd1;69 __aligned_u64 addr;70 __aligned_u64 len;85 __aligned_u64 sq_addr;88 __aligned_u64 sq_len;92 __aligned_u64 rq_addr;95 __aligned_u64 rq_len;116 __aligned_u64 prod_pair_addr;119 __aligned_u64 srq_addr;[all …]
80 __aligned_u64 buf_addr;81 __aligned_u64 db_addr;90 __aligned_u64 buf_addr;94 __aligned_u64 buf_addr;95 __aligned_u64 db_addr;104 __aligned_u64 rx_hash_fields_mask; /* Use enum mlx4_ib_rx_hash_fields */113 __aligned_u64 buf_addr;114 __aligned_u64 db_addr;123 __aligned_u64 buf_addr;124 __aligned_u64 db_addr;[all …]
40 __aligned_u64 buf_addr;41 __aligned_u64 db_addr;45 __aligned_u64 cqn; /* Only 32 bits used, 64 for compat */46 __aligned_u64 cap_flags;50 __aligned_u64 buf_addr;51 __aligned_u64 db_addr;56 __aligned_u64 sdb_addr;60 __aligned_u64 cap_flags;
91 __aligned_u64 uid;92 __aligned_u64 response;103 __aligned_u64 response;113 __aligned_u64 response;154 __aligned_u64 response;160 __aligned_u64 node_guid;170 __aligned_u64 node_guid;221 __aligned_u64 uid;239 __aligned_u64 response;250 __aligned_u64 response; /* rdma_ucm_create_id_resp */[all …]
91 __aligned_u64 lib_caps;141 __aligned_u64 hca_core_clock_offset;163 __aligned_u64 rx_hash_fields_mask; /* enum mlx5_rx_hash_fields */266 __aligned_u64 buf_addr;267 __aligned_u64 db_addr;280 __aligned_u64 buf_addr;287 __aligned_u64 buf_addr;288 __aligned_u64 db_addr;301 __aligned_u64 buf_addr;302 __aligned_u64 db_addr;[all …]
71 __aligned_u64 wr_id;81 __aligned_u64 remote_addr;86 __aligned_u64 remote_addr;87 __aligned_u64 compare_add;88 __aligned_u64 swap;101 __aligned_u64 reserved;110 __aligned_u64 addr;116 __aligned_u64 offset;139 __aligned_u64 iova;150 __aligned_u64 wr_id;[all …]
68 __aligned_u64 cq_va;69 __aligned_u64 cq_handle;80 __aligned_u64 qpsva;81 __aligned_u64 qprva;82 __aligned_u64 qp_handle;91 __aligned_u64 srqva;92 __aligned_u64 srq_handle;
64 __aligned_u64 user_cq_buffer;65 __aligned_u64 user_shadow_area;69 __aligned_u64 user_wqe_buffers;70 __aligned_u64 user_compl_ctx;73 __aligned_u64 user_sq_phb; /* place for VA of the sq phb buff */74 __aligned_u64 user_rq_phb; /* place for VA of the rq phb buff */
48 __aligned_u64 user_rptr_addr;52 __aligned_u64 key;58 __aligned_u64 key;66 __aligned_u64 key;67 __aligned_u64 db_key;
77 __aligned_u64 arm_db_page;78 __aligned_u64 set_db_page;96 __aligned_u64 db_page;107 __aligned_u64 sq_db_page;108 __aligned_u64 rq_db_page;
75 __aligned_u64 user_cq_buffer;81 __aligned_u64 user_wqe_buffers;82 __aligned_u64 user_qp_buffer;
40 #define RDMA_UAPI_PTR(_type, _name) __aligned_u64 _name105 __aligned_u64 iv;152 __aligned_u64 hard_limit_pkts;
67 __aligned_u64 data;78 __aligned_u64 reserved1;
72 __aligned_u64 tx_packets;73 __aligned_u64 tx_bytes;74 __aligned_u64 tx_errors;75 __aligned_u64 rx_packets;76 __aligned_u64 rx_bytes;77 __aligned_u64 rx_seq_discards;78 __aligned_u64 rx_oos_packets;79 __aligned_u64 rx_errors;
31 __aligned_u64 diag_inode;106 __aligned_u64 peer_gid; /* Peer GID */107 __aligned_u64 my_gid; /* My GID */108 __aligned_u64 token; /* Token of DMB */109 __aligned_u64 peer_token; /* Token of remote DMBE */
323 __aligned_u64 key;325 __aligned_u64 value;326 __aligned_u64 next_key;334 __aligned_u64 insns;335 __aligned_u64 license;338 __aligned_u64 log_buf; /* user supplied buffer */351 __aligned_u64 pathname;368 __aligned_u64 data_in;369 __aligned_u64 data_out;388 __aligned_u64 info;[all …]
85 __aligned_u64 tp_all;86 __aligned_u64 tp_huge;87 __aligned_u64 tp_failed;207 __aligned_u64 seq_num;
21 __aligned_u64 from; /* count to be matched */22 __aligned_u64 to; /* count to be matched */