/linux-4.19.296/drivers/clk/hisilicon/ |
D | clk-hi6220.c | 28 static struct hisi_fixed_rate_clock hi6220_fixed_rate_clks[] __initdata = { 44 static struct hisi_fixed_factor_clock hi6220_fixed_factor_clks[] __initdata = { 57 static struct hisi_gate_clock hi6220_separated_gate_clks_ao[] __initdata = { 96 static const char *mmc0_mux0_p[] __initdata = { "pll_ddr_gate", "syspll", }; 97 static const char *mmc0_mux1_p[] __initdata = { "mmc0_mux0", "pll_media_gate", }; 98 static const char *mmc0_src_p[] __initdata = { "mmc0srcsel", "mmc0_div", }; 99 static const char *mmc1_mux0_p[] __initdata = { "pll_ddr_gate", "syspll", }; 100 static const char *mmc1_mux1_p[] __initdata = { "mmc1_mux0", "pll_media_gate", }; 101 static const char *mmc1_src_p[] __initdata = { "mmc1srcsel", "mmc1_div", }; 102 static const char *mmc2_mux0_p[] __initdata = { "pll_ddr_gate", "syspll", }; [all …]
|
/linux-4.19.296/drivers/clk/samsung/ |
D | clk-s3c2410.c | 50 static unsigned long s3c2410_clk_regs[] __initdata = { 98 static struct samsung_mux_clock s3c2410_common_muxes[] __initdata = { 114 static struct samsung_div_clock s3c2410_common_dividers[] __initdata = { 119 static struct samsung_gate_clock s3c2410_common_gates[] __initdata = { 138 static struct samsung_clock_alias s3c2410_common_aliases[] __initdata = { 162 static struct samsung_pll_rate_table pll_s3c2410_12mhz_tbl[] __initdata = { 196 static struct samsung_pll_clock s3c2410_plls[] __initdata = { 203 static struct samsung_div_clock s3c2410_dividers[] __initdata = { 207 static struct samsung_fixed_factor_clock s3c2410_ffactor[] __initdata = { 218 static struct samsung_clock_alias s3c2410_aliases[] __initdata = { [all …]
|
D | clk-s3c2443.c | 53 static unsigned long s3c2443_clk_regs[] __initdata = { 111 static struct samsung_mux_clock s3c2443_common_muxes[] __initdata = { 139 static struct samsung_div_clock s3c2443_common_dividers[] __initdata = { 152 static struct samsung_gate_clock s3c2443_common_gates[] __initdata = { 186 static struct samsung_clock_alias s3c2443_common_aliases[] __initdata = { 222 static struct samsung_pll_clock s3c2416_pll_clks[] __initdata = { 241 static struct samsung_div_clock s3c2416_dividers[] __initdata = { 247 static struct samsung_mux_clock s3c2416_muxes[] __initdata = { 253 static struct samsung_gate_clock s3c2416_gates[] __initdata = { 263 static struct samsung_clock_alias s3c2416_aliases[] __initdata = { [all …]
|
D | clk-s3c2412.c | 39 static unsigned long s3c2412_clk_regs[] __initdata = { 96 static struct samsung_div_clock s3c2412_dividers[] __initdata = { 108 static struct samsung_fixed_factor_clock s3c2412_ffactor[] __initdata = { 128 static struct samsung_mux_clock s3c2412_muxes[] __initdata = { 141 static struct samsung_pll_clock s3c2412_plls[] __initdata = { 146 static struct samsung_gate_clock s3c2412_gates[] __initdata = { 177 static struct samsung_clock_alias s3c2412_aliases[] __initdata = { 227 static struct samsung_fixed_rate_clock s3c2412_common_frate_clks[] __initdata = {
|
D | clk-s3c64xx.c | 70 static unsigned long s3c64xx_clk_regs[] __initdata = { 87 static unsigned long s3c6410_clk_regs[] __initdata = { 173 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_ext_clks) __initdata = { 179 FIXED_RATE_CLOCKS(s3c64xx_fixed_rate_clks) __initdata = { 185 MUX_CLOCKS(s3c64xx_mux_clks) __initdata = { 202 MUX_CLOCKS(s3c6400_mux_clks) __initdata = { 210 MUX_CLOCKS(s3c6410_mux_clks) __initdata = { 221 DIV_CLOCKS(s3c64xx_div_clks) __initdata = { 245 DIV_CLOCKS(s3c6400_div_clks) __initdata = { 250 DIV_CLOCKS(s3c6410_div_clks) __initdata = { [all …]
|
/linux-4.19.296/drivers/char/ipmi/ |
D | ipmi_si_hardcode.c | 16 static char si_type_str[MAX_SI_TYPE_STR] __initdata; 21 static int irqs[SI_MAX_PARMS] __initdata; 22 static unsigned int num_irqs __initdata; variable 23 static int regspacings[SI_MAX_PARMS] __initdata; 24 static unsigned int num_regspacings __initdata; variable 25 static int regsizes[SI_MAX_PARMS] __initdata; 26 static unsigned int num_regsizes __initdata; variable 27 static int regshifts[SI_MAX_PARMS] __initdata; 28 static unsigned int num_regshifts __initdata; variable 29 static int slave_addrs[SI_MAX_PARMS] __initdata; [all …]
|
/linux-4.19.296/drivers/clk/pistachio/ |
D | clk-pistachio.c | 21 static struct pistachio_gate pistachio_gates[] __initdata = { 54 static struct pistachio_fixed_factor pistachio_ffs[] __initdata = { 59 static struct pistachio_div pistachio_divs[] __initdata = { 126 static struct pistachio_mux pistachio_muxes[] __initdata = { 146 static struct pistachio_pll pistachio_plls[] __initdata = { 162 static unsigned int pistachio_critical_clks_core[] __initdata = { 166 static unsigned int pistachio_critical_clks_sys[] __initdata = { 207 static struct pistachio_gate pistachio_periph_gates[] __initdata = { 226 static struct pistachio_div pistachio_periph_divs[] __initdata = { 277 static struct pistachio_gate pistachio_sys_gates[] __initdata = { [all …]
|
/linux-4.19.296/fs/nfs/ |
D | nfsroot.c | 94 static char nfs_root_parms[NFS_MAXPATHLEN + 1] __initdata = ""; 97 static char nfs_root_options[256] __initdata = NFS_DEF_OPTIONS; 100 static __be32 servaddr __initdata = htonl(INADDR_NONE); variable 103 static char nfs_export_path[NFS_MAXPATHLEN + 1] __initdata = ""; 106 static char nfs_root_device[NFS_MAXPATHLEN + 1] __initdata = "";
|
/linux-4.19.296/drivers/clk/rockchip/ |
D | clk-rk3188.c | 145 static struct rockchip_cpuclk_rate_table rk3066_cpuclk_rates[] __initdata = { 183 static struct rockchip_cpuclk_rate_table rk3188_cpuclk_rates[] __initdata = { 221 static struct rockchip_pll_clock rk3066_pll_clks[] __initdata = { 232 static struct rockchip_pll_clock rk3188_pll_clks[] __initdata = { 257 static struct rockchip_clk_branch common_hsadc_out_fracmux __initdata = variable 261 static struct rockchip_clk_branch common_spdif_fracmux __initdata = variable 265 static struct rockchip_clk_branch common_uart0_fracmux __initdata = variable 269 static struct rockchip_clk_branch common_uart1_fracmux __initdata = variable 273 static struct rockchip_clk_branch common_uart2_fracmux __initdata = variable 277 static struct rockchip_clk_branch common_uart3_fracmux __initdata = variable [all …]
|
D | clk-px30.c | 103 static struct rockchip_cpuclk_rate_table px30_cpuclk_rates[] __initdata = { 187 static struct rockchip_pll_clock px30_pll_clks[] __initdata = { 202 static struct rockchip_pll_clock px30_pmu_pll_clks[] __initdata = { 211 static struct rockchip_clk_branch px30_pdm_fracmux __initdata = variable 215 static struct rockchip_clk_branch px30_i2s0_tx_fracmux __initdata = variable 219 static struct rockchip_clk_branch px30_i2s0_rx_fracmux __initdata = variable 223 static struct rockchip_clk_branch px30_i2s1_fracmux __initdata = variable 227 static struct rockchip_clk_branch px30_i2s2_fracmux __initdata = variable 231 static struct rockchip_clk_branch px30_uart1_fracmux __initdata = variable 235 static struct rockchip_clk_branch px30_uart2_fracmux __initdata = variable [all …]
|
D | clk-rk3128.c | 105 static struct rockchip_cpuclk_rate_table rk3128_cpuclk_rates[] __initdata = { 165 static struct rockchip_pll_clock rk3128_pll_clks[] __initdata = { 180 static struct rockchip_clk_branch rk3128_i2s0_fracmux __initdata = variable 184 static struct rockchip_clk_branch rk3128_i2s1_fracmux __initdata = variable 188 static struct rockchip_clk_branch rk3128_spdif_fracmux __initdata = variable 192 static struct rockchip_clk_branch rk3128_uart0_fracmux __initdata = variable 196 static struct rockchip_clk_branch rk3128_uart1_fracmux __initdata = variable 200 static struct rockchip_clk_branch rk3128_uart2_fracmux __initdata = variable 204 static struct rockchip_clk_branch common_clk_branches[] __initdata = { 558 static struct rockchip_clk_branch rk3126_clk_branches[] __initdata = { [all …]
|
D | clk-rk3036.c | 106 static struct rockchip_cpuclk_rate_table rk3036_cpuclk_rates[] __initdata = { 142 static struct rockchip_pll_clock rk3036_pll_clks[] __initdata = { 155 static struct rockchip_clk_branch rk3036_uart0_fracmux __initdata = variable 159 static struct rockchip_clk_branch rk3036_uart1_fracmux __initdata = variable 163 static struct rockchip_clk_branch rk3036_uart2_fracmux __initdata = variable 167 static struct rockchip_clk_branch rk3036_i2s_fracmux __initdata = variable 171 static struct rockchip_clk_branch rk3036_spdif_fracmux __initdata = variable 175 static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
|
D | clk-rk3228.c | 106 static struct rockchip_cpuclk_rate_table rk3228_cpuclk_rates[] __initdata = { 174 static struct rockchip_pll_clock rk3228_pll_clks[] __initdata = { 189 static struct rockchip_clk_branch rk3228_i2s0_fracmux __initdata = variable 193 static struct rockchip_clk_branch rk3228_i2s1_fracmux __initdata = variable 197 static struct rockchip_clk_branch rk3228_i2s2_fracmux __initdata = variable 201 static struct rockchip_clk_branch rk3228_spdif_fracmux __initdata = variable 205 static struct rockchip_clk_branch rk3228_uart0_fracmux __initdata = variable 209 static struct rockchip_clk_branch rk3228_uart1_fracmux __initdata = variable 213 static struct rockchip_clk_branch rk3228_uart2_fracmux __initdata = variable 217 static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
|
D | clk-rk3399.c | 224 static struct rockchip_pll_clock rk3399_pll_clks[] __initdata = { 241 static struct rockchip_pll_clock rk3399_pmu_pll_clks[] __initdata = { 251 static struct rockchip_clk_branch rk3399_spdif_fracmux __initdata = variable 255 static struct rockchip_clk_branch rk3399_i2s0_fracmux __initdata = variable 259 static struct rockchip_clk_branch rk3399_i2s1_fracmux __initdata = variable 263 static struct rockchip_clk_branch rk3399_i2s2_fracmux __initdata = variable 267 static struct rockchip_clk_branch rk3399_uart0_fracmux __initdata = variable 271 static struct rockchip_clk_branch rk3399_uart1_fracmux __initdata = variable 275 static struct rockchip_clk_branch rk3399_uart2_fracmux __initdata = variable 279 static struct rockchip_clk_branch rk3399_uart3_fracmux __initdata = variable [all …]
|
D | clk-rk3368.c | 137 static struct rockchip_pll_clock rk3368_pll_clks[] __initdata = { 226 static struct rockchip_cpuclk_rate_table rk3368_cpuclkb_rates[] __initdata = { 239 static struct rockchip_cpuclk_rate_table rk3368_cpuclkl_rates[] __initdata = { 252 static struct rockchip_clk_branch rk3368_i2s_8ch_fracmux __initdata = variable 256 static struct rockchip_clk_branch rk3368_spdif_8ch_fracmux __initdata = variable 260 static struct rockchip_clk_branch rk3368_i2s_2ch_fracmux __initdata = variable 264 static struct rockchip_clk_branch rk3368_uart0_fracmux __initdata = variable 268 static struct rockchip_clk_branch rk3368_uart1_fracmux __initdata = variable 272 static struct rockchip_clk_branch rk3368_uart3_fracmux __initdata = variable 276 static struct rockchip_clk_branch rk3368_uart4_fracmux __initdata = variable [all …]
|
D | clk-rk3328.c | 118 static struct rockchip_cpuclk_rate_table rk3328_cpuclk_rates[] __initdata = { 221 static struct rockchip_pll_clock rk3328_pll_clks[] __initdata = { 243 static struct rockchip_clk_branch rk3328_i2s0_fracmux __initdata = variable 247 static struct rockchip_clk_branch rk3328_i2s1_fracmux __initdata = variable 251 static struct rockchip_clk_branch rk3328_i2s2_fracmux __initdata = variable 255 static struct rockchip_clk_branch rk3328_spdif_fracmux __initdata = variable 259 static struct rockchip_clk_branch rk3328_uart0_fracmux __initdata = variable 263 static struct rockchip_clk_branch rk3328_uart1_fracmux __initdata = variable 267 static struct rockchip_clk_branch rk3328_uart2_fracmux __initdata = variable 271 static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
|
D | clk-rk3288.c | 147 static struct rockchip_cpuclk_rate_table rk3288_cpuclk_rates[] __initdata = { 207 static struct rockchip_pll_clock rk3288_pll_clks[] __initdata = { 232 static struct rockchip_clk_branch rk3288_i2s_fracmux __initdata = variable 236 static struct rockchip_clk_branch rk3288_spdif_fracmux __initdata = variable 240 static struct rockchip_clk_branch rk3288_spdif_8ch_fracmux __initdata = variable 244 static struct rockchip_clk_branch rk3288_uart0_fracmux __initdata = variable 248 static struct rockchip_clk_branch rk3288_uart1_fracmux __initdata = variable 252 static struct rockchip_clk_branch rk3288_uart2_fracmux __initdata = variable 256 static struct rockchip_clk_branch rk3288_uart3_fracmux __initdata = variable 260 static struct rockchip_clk_branch rk3288_uart4_fracmux __initdata = variable [all …]
|
/linux-4.19.296/drivers/clk/ |
D | clk-asm9260.c | 246 static const char __initdata *main_mux_p[] = { NULL, NULL }; 247 static const char __initdata *i2s0_mux_p[] = { NULL, NULL, "i2s0m_div"}; 248 static const char __initdata *i2s1_mux_p[] = { NULL, NULL, "i2s1m_div"}; 249 static const char __initdata *clkout_mux_p[] = { NULL, NULL, "rtc"}; 252 static struct asm9260_mux_clock asm9260_mux_clks[] __initdata = {
|
/linux-4.19.296/lib/ |
D | test_printf.c | 27 static unsigned total_tests __initdata; variable 28 static unsigned failed_tests __initdata; variable 29 static char *test_buffer __initdata; variable 30 static char *alloced_buffer __initdata; variable 385 static struct dentry test_dentry[4] __initdata = {
|
D | test_uuid.c | 42 static unsigned total_tests __initdata; variable 43 static unsigned failed_tests __initdata; variable
|
/linux-4.19.296/drivers/clk/pxa/ |
D | clk-pxa3xx.c | 143 static struct desc_clk_cken pxa3xx_clocks[] __initdata = { 174 static struct desc_clk_cken pxa300_310_clocks[] __initdata = { 181 static struct desc_clk_cken pxa320_clocks[] __initdata = { 187 static struct desc_clk_cken pxa93x_clocks[] __initdata = { 309 static struct dummy_clk dummy_clks[] __initdata = {
|
/linux-4.19.296/drivers/clk/imx/ |
D | clk.c | 78 static int imx_keep_uart_clocks __initdata; variable 79 static struct clk ** const *imx_uart_clocks __initdata; variable
|
/linux-4.19.296/include/linux/ |
D | of_fdt.h | 40 extern int __initdata dt_root_addr_cells; 41 extern int __initdata dt_root_size_cells;
|
/linux-4.19.296/drivers/clk/renesas/ |
D | rcar-gen2-cpg.c | 261 static const struct rcar_gen2_cpg_pll_config *cpg_pll_config __initdata; variable 262 static unsigned int cpg_pll0_div __initdata; variable 263 static u32 cpg_mode __initdata; variable 264 static u32 cpg_quirks __initdata; variable
|
D | clk-r8a7778.c | 49 static u32 cpg_mode_rates __initdata; variable 50 static u32 cpg_mode_divs __initdata; variable
|