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Searched refs:_atclk (Results 1 – 3 of 3) sorted by relevance

/linux-4.19.296/drivers/clk/rockchip/
Dclk-rk3368.c197 #define RK3368_CLKSEL1(_offs, _atclk, _pdbg) \ argument
200 .val = HIWORD_UPDATE(_atclk, RK3368_DIV_ATCLK_MASK, \
207 #define RK3368_CPUCLKB_RATE(_prate, _aclkm, _atclk, _pdbg) \ argument
212 RK3368_CLKSEL1(0, _atclk, _pdbg), \
217 #define RK3368_CPUCLKL_RATE(_prate, _aclkm, _atclk, _pdbg) \ argument
222 RK3368_CLKSEL1(2, _atclk, _pdbg), \
Dclk-rk3399.c332 #define RK3399_CLKSEL1(_offs, _atclk, _pdbg) \ argument
335 .val = HIWORD_UPDATE(_atclk, RK3399_DIV_ATCLK_MASK, \
342 #define RK3399_CPUCLKL_RATE(_prate, _aclkm, _atclk, _pdbg) \ argument
347 RK3399_CLKSEL1(0, _atclk, _pdbg), \
352 #define RK3399_CPUCLKB_RATE(_prate, _aclkm, _atclk, _pdbg) \ argument
357 RK3399_CLKSEL1(2, _atclk, _pdbg), \
Dclk-rk3288.c126 #define RK3288_CLKSEL37(_l2ram, _atclk, _pclk_dbg_pre) \ argument
131 HIWORD_UPDATE(_atclk, RK3288_DIV_ATCLK_MASK, \
138 #define RK3288_CPUCLK_RATE(_prate, _core_m0, _core_mp, _l2ram, _atclk, _pdbg) \ argument
143 RK3288_CLKSEL37(_l2ram, _atclk, _pdbg), \