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/linux-4.19.296/include/linux/
Dmod_devicetable.h400 #define BCMA_CORE(_manuf, _id, _rev, _class) \ argument
401 { .manuf = _manuf, .id = _id, .rev = _rev, .class = _class, }
555 #define MDIO_ID_ARGS(_id) \ argument
556 ((_id)>>31) & 1, ((_id)>>30) & 1, ((_id)>>29) & 1, ((_id)>>28) & 1, \
557 ((_id)>>27) & 1, ((_id)>>26) & 1, ((_id)>>25) & 1, ((_id)>>24) & 1, \
558 ((_id)>>23) & 1, ((_id)>>22) & 1, ((_id)>>21) & 1, ((_id)>>20) & 1, \
559 ((_id)>>19) & 1, ((_id)>>18) & 1, ((_id)>>17) & 1, ((_id)>>16) & 1, \
560 ((_id)>>15) & 1, ((_id)>>14) & 1, ((_id)>>13) & 1, ((_id)>>12) & 1, \
561 ((_id)>>11) & 1, ((_id)>>10) & 1, ((_id)>>9) & 1, ((_id)>>8) & 1, \
562 ((_id)>>7) & 1, ((_id)>>6) & 1, ((_id)>>5) & 1, ((_id)>>4) & 1, \
[all …]
/linux-4.19.296/drivers/clk/samsung/
Dclk.h45 #define ALIAS(_id, dname, a) \ argument
47 .id = _id, \
70 #define FRATE(_id, cname, pname, f, frate) \ argument
72 .id = _id, \
97 #define FFACTOR(_id, cname, pname, m, d, f) \ argument
99 .id = _id, \
131 #define __MUX(_id, cname, pnames, o, s, w, f, mf) \ argument
133 .id = _id, \
144 #define MUX(_id, cname, pnames, o, s, w) \ argument
145 __MUX(_id, cname, pnames, o, s, w, 0, 0)
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/linux-4.19.296/include/rdma/
Duverbs_std_types.h55 #define _uobj_check_id(_id) ((_id) * typecheck(u32, _id)) argument
60 #define uobj_get_read(_type, _id, _ufile) \ argument
62 _uobj_check_id(_id), UVERBS_LOOKUP_READ)
75 #define uobj_get_obj_read(_object, _type, _id, _ufile) \ argument
77 uobj_get_read(_type, _id, _ufile)))
79 #define uobj_get_write(_type, _id, _ufile) \ argument
81 _uobj_check_id(_id), UVERBS_LOOKUP_WRITE)
85 #define uobj_perform_destroy(_type, _id, _ufile, _success_res) \ argument
87 _uobj_check_id(_id), _ufile, _success_res)
92 #define uobj_get_destroy(_type, _id, _ufile) \ argument
[all …]
/linux-4.19.296/drivers/clk/pistachio/
Dclk.h22 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
24 .id = _id, \
42 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
44 .id = _id, \
62 #define DIV(_id, _name, _pname, _reg, _width) \ argument
64 .id = _id, \
72 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
74 .id = _id, \
89 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
91 .id = _id, \
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/linux-4.19.296/drivers/clk/renesas/
Drenesas-cpg-mssr.h46 #define DEF_TYPE(_name, _id, _type...) \ argument
47 { .name = _name, .id = _id, .type = _type }
48 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
49 DEF_TYPE(_name, _id, _type, .parent = _parent)
51 #define DEF_INPUT(_name, _id) \ argument
52 DEF_TYPE(_name, _id, CLK_TYPE_IN)
53 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument
54 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
55 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
56 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
[all …]
Drcar-gen3-cpg.h28 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
29 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
31 #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ argument
33 DEF_BASE(_name, _id, CLK_TYPE_GEN3_PE, \
/linux-4.19.296/drivers/clk/rockchip/
Dclk.h291 #define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \ argument
294 .id = _id, \
420 #define COMPOSITE(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ argument
423 .id = _id, \
441 #define COMPOSITE_NOMUX(_id, cname, pname, f, mo, ds, dw, df, \ argument
444 .id = _id, \
459 #define COMPOSITE_NOMUX_DIVTBL(_id, cname, pname, f, mo, ds, dw,\ argument
462 .id = _id, \
478 #define COMPOSITE_NODIV(_id, cname, pnames, f, mo, ms, mw, mf, \ argument
481 .id = _id, \
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/linux-4.19.296/drivers/clk/mediatek/
Dclk-mtk.h37 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument
38 .id = _id, \
55 #define FACTOR(_id, _name, _parent, _mult, _div) { \ argument
56 .id = _id, \
91 #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ argument
93 .id = _id, \
110 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ argument
111 MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
114 #define MUX(_id, _name, _parents, _reg, _shift, _width) { \ argument
115 .id = _id, \
[all …]
Dclk-mt2701-aud.c18 #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ argument
19 .id = _id, \
27 #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ argument
28 .id = _id, \
36 #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ argument
37 .id = _id, \
45 #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ argument
46 .id = _id, \
Dclk-mt7622-aud.c27 #define GATE_AUDIO0(_id, _name, _parent, _shift) { \ argument
28 .id = _id, \
36 #define GATE_AUDIO1(_id, _name, _parent, _shift) { \ argument
37 .id = _id, \
45 #define GATE_AUDIO2(_id, _name, _parent, _shift) { \ argument
46 .id = _id, \
54 #define GATE_AUDIO3(_id, _name, _parent, _shift) { \ argument
55 .id = _id, \
Dclk-mt8173.c630 #define GATE_ICG(_id, _name, _parent, _shift) { \ argument
631 .id = _id, \
669 #define GATE_PERI0(_id, _name, _parent, _shift) { \ argument
670 .id = _id, \
678 #define GATE_PERI1(_id, _name, _parent, _shift) { \ argument
679 .id = _id, \
745 #define GATE_IMG(_id, _name, _parent, _shift) { \ argument
746 .id = _id, \
776 #define GATE_MM0(_id, _name, _parent, _shift) { \ argument
777 .id = _id, \
[all …]
Dclk-mt7622.c32 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
35 .id = _id, \
53 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
56 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\
60 #define GATE_APMIXED(_id, _name, _parent, _shift) { \ argument
61 .id = _id, \
69 #define GATE_INFRA(_id, _name, _parent, _shift) { \ argument
70 .id = _id, \
78 #define GATE_TOP0(_id, _name, _parent, _shift) { \ argument
79 .id = _id, \
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Dclk-mt2712-vdec.c35 #define GATE_VDEC0(_id, _name, _parent, _shift) { \ argument
36 .id = _id, \
44 #define GATE_VDEC1(_id, _name, _parent, _shift) { \ argument
45 .id = _id, \
Dclk-mt2712-mm.c41 #define GATE_MM0(_id, _name, _parent, _shift) { \ argument
42 .id = _id, \
50 #define GATE_MM1(_id, _name, _parent, _shift) { \ argument
51 .id = _id, \
59 #define GATE_MM2(_id, _name, _parent, _shift) { \ argument
60 .id = _id, \
Dclk-mt2701-vdec.c35 #define GATE_VDEC0(_id, _name, _parent, _shift) { \ argument
36 .id = _id, \
44 #define GATE_VDEC1(_id, _name, _parent, _shift) { \ argument
45 .id = _id, \
Dclk-mt6797-vdec.c35 #define GATE_VDEC0(_id, _name, _parent, _shift) { \ argument
36 .id = _id, \
44 #define GATE_VDEC1(_id, _name, _parent, _shift) { \ argument
45 .id = _id, \
/linux-4.19.296/drivers/clk/zte/
Dclk.h63 #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags) \ argument
75 .id = _id, \
83 #define FFACTOR(_id, _name, _parent, _mult, _div, _flag) \ argument
93 .id = _id, \
101 #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag) \ argument
114 .id = _id, \
117 #define MUX(_id, _name, _parent, _reg, _shift, _width) \ argument
118 MUX_F(_id, _name, _parent, _reg, _shift, _width, 0, 0)
125 #define DIV_T(_id, _name, _parent, _reg, _shift, _width, _flag, _table) \ argument
139 .id = _id, \
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/linux-4.19.296/drivers/regulator/
Dmt6311-regulator.c62 #define MT6311_BUCK(_id) \ argument
64 .name = #_id,\
66 .of_match = of_match_ptr(#_id),\
69 .id = MT6311_ID_##_id,\
82 #define MT6311_LDO(_id) \ argument
84 .name = #_id,\
86 .of_match = of_match_ptr(#_id),\
89 .id = MT6311_ID_##_id,\
Dhi6421-regulator.c169 #define HI6421_LDO(_id, v_table, vreg, vmask, ereg, emask, \ argument
171 [HI6421_##_id] = { \
173 .name = #_id, \
176 .id = HI6421_##_id, \
205 #define HI6421_LDO_LINEAR(_id, _min_uV, n_volt, vstep, vreg, vmask, \ argument
207 [HI6421_##_id] = { \
209 .name = #_id, \
212 .id = HI6421_##_id, \
242 #define HI6421_LDO_LINEAR_RANGE(_id, n_volt, volt_ranges, vreg, vmask, \ argument
244 [HI6421_##_id] = { \
[all …]
Dmax8925-regulator.c158 #define MAX8925_SDV(_id, min, max, step) \ argument
161 .name = "SDV" #_id, \
164 .id = MAX8925_ID_SD##_id, \
170 .vol_reg = MAX8925_SDV##_id, \
171 .enable_reg = MAX8925_SDCTL##_id, \
174 #define MAX8925_LDO(_id, min, max, step) \ argument
177 .name = "LDO" #_id, \
180 .id = MAX8925_ID_LDO##_id, \
186 .vol_reg = MAX8925_LDOVOUT##_id, \
187 .enable_reg = MAX8925_LDOCTL##_id, \
Dact8945a-regulator.c82 #define ACT89xx_REG(_name, _family, _id, _vsel_reg, _supply) \ argument
83 [_family##_ID_##_id] = { \
86 .of_match = of_match_ptr("REG_"#_id), \
88 .id = _family##_ID_##_id, \
94 .vsel_reg = _family##_##_id##_##_vsel_reg, \
96 .enable_reg = _family##_##_id##_CTRL, \
Dda903x.c313 #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
316 .name = "LDO" #_id, \
319 .id = _pmic##_ID_LDO##_id, \
333 #define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
336 .name = #_id, \
339 .id = _pmic##_ID_##_id, \
355 #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
356 DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
358 #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
359 DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
[all …]
Dtps80031-regulator.c425 #define TPS80031_REG_SMPS(_id, _volt_id, _pbit) \ argument
427 .trans_reg = TPS80031_##_id##_CFG_TRANS, \
428 .state_reg = TPS80031_##_id##_CFG_STATE, \
429 .force_reg = TPS80031_##_id##_CFG_FORCE, \
430 .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \
434 .name = "tps80031_"#_id, \
435 .id = TPS80031_REGULATOR_##_id, \
444 #define TPS80031_REG_LDO(_id, _preq_bit) \ argument
446 .trans_reg = TPS80031_##_id##_CFG_TRANS, \
447 .state_reg = TPS80031_##_id##_CFG_STATE, \
[all …]
Drc5t583-regulator.c76 #define RC5T583_REG(_id, _en_reg, _en_bit, _disc_reg, _disc_bit, \ argument
81 .deepsleep_reg = RC5T583_REG_##_id##DAC_DS, \
83 .deepsleep_id = RC5T583_DS_##_id, \
85 .name = "rc5t583-regulator-"#_id, \
86 .id = RC5T583_REGULATOR_##_id, \
91 .vsel_reg = RC5T583_REG_##_id##DAC, \
/linux-4.19.296/drivers/iio/adc/
Dda9150-gpadc.c254 #define DA9150_GPADC_CHANNEL(_id, _hw_id, _type, chan_info, \ argument
258 .channel = DA9150_GPADC_CHAN_##_id, \
262 .datasheet_name = #_id, \
265 #define DA9150_GPADC_CHANNEL_RAW(_id, _hw_id, _type, _ext_name) \ argument
266 DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
269 #define DA9150_GPADC_CHANNEL_SCALED(_id, _hw_id, _type, _ext_name) \ argument
270 DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \
276 #define DA9150_GPADC_CHANNEL_PROCESSED(_id, _hw_id, _type, _ext_name) \ argument
277 DA9150_GPADC_CHANNEL(_id, _hw_id, _type, \

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