1 /*
2 * AD7887 SPI ADC driver
3 *
4 * Copyright 2010-2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/err.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/bitops.h>
19
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23
24 #include <linux/iio/trigger_consumer.h>
25 #include <linux/iio/triggered_buffer.h>
26
27 #include <linux/platform_data/ad7887.h>
28
29 #define AD7887_REF_DIS BIT(5) /* on-chip reference disable */
30 #define AD7887_DUAL BIT(4) /* dual-channel mode */
31 #define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */
32 #define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */
33 #define AD7887_PM_MODE1 0 /* CS based shutdown */
34 #define AD7887_PM_MODE2 1 /* full on */
35 #define AD7887_PM_MODE3 2 /* auto shutdown after conversion */
36 #define AD7887_PM_MODE4 3 /* standby mode */
37
38 enum ad7887_channels {
39 AD7887_CH0,
40 AD7887_CH0_CH1,
41 AD7887_CH1,
42 };
43
44 /**
45 * struct ad7887_chip_info - chip specifc information
46 * @int_vref_mv: the internal reference voltage
47 * @channel: channel specification
48 */
49 struct ad7887_chip_info {
50 u16 int_vref_mv;
51 struct iio_chan_spec channel[3];
52 };
53
54 struct ad7887_state {
55 struct spi_device *spi;
56 const struct ad7887_chip_info *chip_info;
57 struct regulator *reg;
58 struct spi_transfer xfer[4];
59 struct spi_message msg[3];
60 struct spi_message *ring_msg;
61 unsigned char tx_cmd_buf[4];
62
63 /*
64 * DMA (thus cache coherency maintenance) requires the
65 * transfer buffers to live in their own cache lines.
66 * Buffer needs to be large enough to hold two 16 bit samples and a
67 * 64 bit aligned 64 bit timestamp.
68 */
69 unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
70 ____cacheline_aligned;
71 };
72
73 enum ad7887_supported_device_ids {
74 ID_AD7887
75 };
76
ad7887_ring_preenable(struct iio_dev * indio_dev)77 static int ad7887_ring_preenable(struct iio_dev *indio_dev)
78 {
79 struct ad7887_state *st = iio_priv(indio_dev);
80
81 /* We know this is a single long so can 'cheat' */
82 switch (*indio_dev->active_scan_mask) {
83 case (1 << 0):
84 st->ring_msg = &st->msg[AD7887_CH0];
85 break;
86 case (1 << 1):
87 st->ring_msg = &st->msg[AD7887_CH1];
88 /* Dummy read: push CH1 setting down to hardware */
89 spi_sync(st->spi, st->ring_msg);
90 break;
91 case ((1 << 1) | (1 << 0)):
92 st->ring_msg = &st->msg[AD7887_CH0_CH1];
93 break;
94 }
95
96 return 0;
97 }
98
ad7887_ring_postdisable(struct iio_dev * indio_dev)99 static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
100 {
101 struct ad7887_state *st = iio_priv(indio_dev);
102
103 /* dummy read: restore default CH0 settin */
104 return spi_sync(st->spi, &st->msg[AD7887_CH0]);
105 }
106
107 /**
108 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer
109 *
110 * Currently there is no option in this driver to disable the saving of
111 * timestamps within the ring.
112 **/
ad7887_trigger_handler(int irq,void * p)113 static irqreturn_t ad7887_trigger_handler(int irq, void *p)
114 {
115 struct iio_poll_func *pf = p;
116 struct iio_dev *indio_dev = pf->indio_dev;
117 struct ad7887_state *st = iio_priv(indio_dev);
118 int b_sent;
119
120 b_sent = spi_sync(st->spi, st->ring_msg);
121 if (b_sent)
122 goto done;
123
124 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
125 iio_get_time_ns(indio_dev));
126 done:
127 iio_trigger_notify_done(indio_dev->trig);
128
129 return IRQ_HANDLED;
130 }
131
132 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
133 .preenable = &ad7887_ring_preenable,
134 .postenable = &iio_triggered_buffer_postenable,
135 .predisable = &iio_triggered_buffer_predisable,
136 .postdisable = &ad7887_ring_postdisable,
137 };
138
ad7887_scan_direct(struct ad7887_state * st,unsigned ch)139 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
140 {
141 int ret = spi_sync(st->spi, &st->msg[ch]);
142 if (ret)
143 return ret;
144
145 return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
146 }
147
ad7887_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)148 static int ad7887_read_raw(struct iio_dev *indio_dev,
149 struct iio_chan_spec const *chan,
150 int *val,
151 int *val2,
152 long m)
153 {
154 int ret;
155 struct ad7887_state *st = iio_priv(indio_dev);
156
157 switch (m) {
158 case IIO_CHAN_INFO_RAW:
159 ret = iio_device_claim_direct_mode(indio_dev);
160 if (ret)
161 return ret;
162 ret = ad7887_scan_direct(st, chan->address);
163 iio_device_release_direct_mode(indio_dev);
164
165 if (ret < 0)
166 return ret;
167 *val = ret >> chan->scan_type.shift;
168 *val &= GENMASK(chan->scan_type.realbits - 1, 0);
169 return IIO_VAL_INT;
170 case IIO_CHAN_INFO_SCALE:
171 if (st->reg) {
172 *val = regulator_get_voltage(st->reg);
173 if (*val < 0)
174 return *val;
175 *val /= 1000;
176 } else {
177 *val = st->chip_info->int_vref_mv;
178 }
179
180 *val2 = chan->scan_type.realbits;
181
182 return IIO_VAL_FRACTIONAL_LOG2;
183 }
184 return -EINVAL;
185 }
186
187
188 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
189 /*
190 * More devices added in future
191 */
192 [ID_AD7887] = {
193 .channel[0] = {
194 .type = IIO_VOLTAGE,
195 .indexed = 1,
196 .channel = 1,
197 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
198 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
199 .address = 1,
200 .scan_index = 1,
201 .scan_type = {
202 .sign = 'u',
203 .realbits = 12,
204 .storagebits = 16,
205 .shift = 0,
206 .endianness = IIO_BE,
207 },
208 },
209 .channel[1] = {
210 .type = IIO_VOLTAGE,
211 .indexed = 1,
212 .channel = 0,
213 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
214 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
215 .address = 0,
216 .scan_index = 0,
217 .scan_type = {
218 .sign = 'u',
219 .realbits = 12,
220 .storagebits = 16,
221 .shift = 0,
222 .endianness = IIO_BE,
223 },
224 },
225 .channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
226 .int_vref_mv = 2500,
227 },
228 };
229
230 static const struct iio_info ad7887_info = {
231 .read_raw = &ad7887_read_raw,
232 };
233
ad7887_probe(struct spi_device * spi)234 static int ad7887_probe(struct spi_device *spi)
235 {
236 struct ad7887_platform_data *pdata = spi->dev.platform_data;
237 struct ad7887_state *st;
238 struct iio_dev *indio_dev;
239 uint8_t mode;
240 int ret;
241
242 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
243 if (indio_dev == NULL)
244 return -ENOMEM;
245
246 st = iio_priv(indio_dev);
247
248 if (!pdata || !pdata->use_onchip_ref) {
249 st->reg = devm_regulator_get(&spi->dev, "vref");
250 if (IS_ERR(st->reg))
251 return PTR_ERR(st->reg);
252
253 ret = regulator_enable(st->reg);
254 if (ret)
255 return ret;
256 }
257
258 st->chip_info =
259 &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
260
261 spi_set_drvdata(spi, indio_dev);
262 st->spi = spi;
263
264 /* Estabilish that the iio_dev is a child of the spi device */
265 indio_dev->dev.parent = &spi->dev;
266 indio_dev->dev.of_node = spi->dev.of_node;
267 indio_dev->name = spi_get_device_id(spi)->name;
268 indio_dev->info = &ad7887_info;
269 indio_dev->modes = INDIO_DIRECT_MODE;
270
271 /* Setup default message */
272
273 mode = AD7887_PM_MODE4;
274 if (!pdata || !pdata->use_onchip_ref)
275 mode |= AD7887_REF_DIS;
276 if (pdata && pdata->en_dual)
277 mode |= AD7887_DUAL;
278
279 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
280
281 st->xfer[0].rx_buf = &st->data[0];
282 st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
283 st->xfer[0].len = 2;
284
285 spi_message_init(&st->msg[AD7887_CH0]);
286 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
287
288 if (pdata && pdata->en_dual) {
289 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
290
291 st->xfer[1].rx_buf = &st->data[0];
292 st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
293 st->xfer[1].len = 2;
294
295 st->xfer[2].rx_buf = &st->data[2];
296 st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
297 st->xfer[2].len = 2;
298
299 spi_message_init(&st->msg[AD7887_CH0_CH1]);
300 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
301 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
302
303 st->xfer[3].rx_buf = &st->data[2];
304 st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
305 st->xfer[3].len = 2;
306
307 spi_message_init(&st->msg[AD7887_CH1]);
308 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
309
310 indio_dev->channels = st->chip_info->channel;
311 indio_dev->num_channels = 3;
312 } else {
313 indio_dev->channels = &st->chip_info->channel[1];
314 indio_dev->num_channels = 2;
315 }
316
317 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
318 &ad7887_trigger_handler, &ad7887_ring_setup_ops);
319 if (ret)
320 goto error_disable_reg;
321
322 ret = iio_device_register(indio_dev);
323 if (ret)
324 goto error_unregister_ring;
325
326 return 0;
327 error_unregister_ring:
328 iio_triggered_buffer_cleanup(indio_dev);
329 error_disable_reg:
330 if (st->reg)
331 regulator_disable(st->reg);
332
333 return ret;
334 }
335
ad7887_remove(struct spi_device * spi)336 static int ad7887_remove(struct spi_device *spi)
337 {
338 struct iio_dev *indio_dev = spi_get_drvdata(spi);
339 struct ad7887_state *st = iio_priv(indio_dev);
340
341 iio_device_unregister(indio_dev);
342 iio_triggered_buffer_cleanup(indio_dev);
343 if (st->reg)
344 regulator_disable(st->reg);
345
346 return 0;
347 }
348
349 static const struct spi_device_id ad7887_id[] = {
350 {"ad7887", ID_AD7887},
351 {}
352 };
353 MODULE_DEVICE_TABLE(spi, ad7887_id);
354
355 static struct spi_driver ad7887_driver = {
356 .driver = {
357 .name = "ad7887",
358 },
359 .probe = ad7887_probe,
360 .remove = ad7887_remove,
361 .id_table = ad7887_id,
362 };
363 module_spi_driver(ad7887_driver);
364
365 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
366 MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
367 MODULE_LICENSE("GPL v2");
368