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Searched refs:ahb (Results 1 – 6 of 6) sorted by relevance

/linux-4.19.296/drivers/amba/
Dtegra-ahb.c135 static inline u32 gizmo_readl(struct tegra_ahb *ahb, u32 offset) in gizmo_readl() argument
137 return readl(ahb->regs + offset); in gizmo_readl()
140 static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset) in gizmo_writel() argument
142 writel(value, ahb->regs + offset); in gizmo_writel()
148 struct tegra_ahb *ahb = dev_get_drvdata(dev); in tegra_ahb_match_by_smmu() local
151 return (ahb->dev->of_node == dn) ? 1 : 0; in tegra_ahb_match_by_smmu()
158 struct tegra_ahb *ahb; in tegra_ahb_enable_smmu() local
164 ahb = dev_get_drvdata(dev); in tegra_ahb_enable_smmu()
165 val = gizmo_readl(ahb, AHB_ARBITRATION_XBAR_CTRL); in tegra_ahb_enable_smmu()
167 gizmo_writel(ahb, val, AHB_ARBITRATION_XBAR_CTRL); in tegra_ahb_enable_smmu()
[all …]
DMakefile2 obj-$(CONFIG_TEGRA_AHB) += tegra-ahb.o
/linux-4.19.296/drivers/clk/imx/
Dclk-imx35.c38 unsigned char arm, ahb, sel; member
42 { .arm = 1, .ahb = 4, .sel = 0},
43 { .arm = 1, .ahb = 3, .sel = 1},
44 { .arm = 2, .ahb = 2, .sel = 0},
45 { .arm = 0, .ahb = 0, .sel = 0},
46 { .arm = 0, .ahb = 0, .sel = 0},
47 { .arm = 0, .ahb = 0, .sel = 0},
48 { .arm = 4, .ahb = 1, .sel = 0},
49 { .arm = 1, .ahb = 5, .sel = 0},
50 { .arm = 1, .ahb = 8, .sel = 0},
[all …]
Dclk-imx25.c66 dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, enumerator
109 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
236 clk_set_parent(clk[per5_sel], clk[ahb]); in __mx25_clocks_init()
Dclk-imx31.c52 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
86 clk[ahb] = imx_clk_divider("ahb", "mcu_main", base + MXC_CCM_PDR0, 3, 3); in _mx31_clocks_init()
/linux-4.19.296/include/soc/tegra/
Dahb.h17 extern int tegra_ahb_enable_smmu(struct device_node *ahb);