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Searched refs:aud_intbus_parents (Results 1 – 6 of 6) sorted by relevance

/linux-4.19.296/drivers/clk/mediatek/
Dclk-mt8135.c171 static const char * const aud_intbus_parents[] __initconst = { variable
367 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt6797.c234 static const char * const aud_intbus_parents[] = { variable
359 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt7622.c239 static const char * const aud_intbus_parents[] = { variable
565 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt2701.c257 static const char * const aud_intbus_parents[] = { variable
534 MUX_GATE(CLK_TOP_AUDINTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt2712.c402 static const char * const aud_intbus_parents[] = { variable
783 aud_intbus_parents, 0x080, 24, 3, 31),
Dclk-mt8173.c334 static const char * const aud_intbus_parents[] __initconst = { variable
573 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, 0x0080, 24, 3, 31),