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Searched refs:base_clk (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/drivers/clk/sunxi/
Dclk-a10-pll2.c50 struct clk **clks, *base_clk, *prediv_clk; in sun4i_pll2_setup() local
103 base_clk = clk_register_composite(NULL, "pll2-base", in sun4i_pll2_setup()
109 if (IS_ERR(base_clk)) { in sun4i_pll2_setup()
114 parent = __clk_get_name(base_clk); in sun4i_pll2_setup()
/linux-4.19.296/drivers/pwm/
Dpwm-samsung.c91 struct clk *base_clk; member
161 rate = clk_get_rate(chip->base_clk); in pwm_samsung_get_tin_rate()
552 chip->base_clk = devm_clk_get(&pdev->dev, "timers"); in pwm_samsung_probe()
553 if (IS_ERR(chip->base_clk)) { in pwm_samsung_probe()
555 return PTR_ERR(chip->base_clk); in pwm_samsung_probe()
558 ret = clk_prepare_enable(chip->base_clk); in pwm_samsung_probe()
577 clk_disable_unprepare(chip->base_clk); in pwm_samsung_probe()
582 clk_get_rate(chip->base_clk), in pwm_samsung_probe()
598 clk_disable_unprepare(chip->base_clk); in pwm_samsung_remove()