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Searched refs:bw (Results 1 – 25 of 49) sorted by relevance

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/linux-4.19.296/drivers/media/dvb-frontends/
Ddib7000m.c319 static int dib7000m_set_bandwidth(struct dib7000m_state *state, u32 bw) in dib7000m_set_bandwidth() argument
323 if (!bw) in dib7000m_set_bandwidth()
324 bw = 8000; in dib7000m_set_bandwidth()
327 state->current_bandwidth = bw; in dib7000m_set_bandwidth()
337 timf = timf * (bw / 50) / 160; in dib7000m_set_bandwidth()
385 … dib7000m_reset_pll_common(struct dib7000m_state *state, const struct dibx000_bandwidth_config *bw) in dib7000m_reset_pll_common() argument
387 dib7000m_write_word(state, 18, (u16) (((bw->internal*1000) >> 16) & 0xffff)); in dib7000m_reset_pll_common()
388 dib7000m_write_word(state, 19, (u16) ( (bw->internal*1000) & 0xffff)); in dib7000m_reset_pll_common()
389 dib7000m_write_word(state, 21, (u16) ( (bw->ifreq >> 16) & 0xffff)); in dib7000m_reset_pll_common()
390 dib7000m_write_word(state, 22, (u16) ( bw->ifreq & 0xffff)); in dib7000m_reset_pll_common()
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Ddib7000p.c376 static int dib7000p_set_bandwidth(struct dib7000p_state *state, u32 bw) in dib7000p_set_bandwidth() argument
381 state->current_bandwidth = bw; in dib7000p_set_bandwidth()
385 timf = state->cfg.bw->timf; in dib7000p_set_bandwidth()
391 timf = timf * (bw / 50) / 160; in dib7000p_set_bandwidth()
452 struct dibx000_bandwidth_config *bw = &state->cfg.bw[0]; in dib7000p_reset_pll() local
456 …dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio <… in dib7000p_reset_pll()
461 dib7000p_write_word(state, 1857, dib7000p_read_word(state, 1857) | (!bw->pll_bypass << 15)); in dib7000p_reset_pll()
464 clk_cfg0 = (1 << 15) | ((bw->pll_ratio & 0x3f) << 9) | in dib7000p_reset_pll()
465 …(bw->modulo << 7) | (bw->ADClkSrc << 6) | (bw->IO_CLK_en_core << 5) | (bw->bypclk_div << 2) | (bw-… in dib7000p_reset_pll()
470 …dib7000p_write_word(state, 903, (bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw-… in dib7000p_reset_pll()
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Ddvb-pll.c98 u32 bw = fe->dtv_property_cache.bandwidth_hz; in thomson_dtt759x_bw() local
99 if (bw == 7000000) in thomson_dtt759x_bw()
122 u32 bw = fe->dtv_property_cache.bandwidth_hz; in thomson_dtt7520x_bw() local
123 if (bw == 8000000) in thomson_dtt7520x_bw()
216 u32 bw = fe->dtv_property_cache.bandwidth_hz; in tda665x_bw() local
217 if (bw == 8000000) in tda665x_bw()
250 u32 bw = fe->dtv_property_cache.bandwidth_hz; in tua6034_bw() local
251 if (bw == 7000000) in tua6034_bw()
274 u32 bw = fe->dtv_property_cache.bandwidth_hz; in tded4_bw() local
275 if (bw == 8000000) in tded4_bw()
Dtda10048.c340 u32 bw) in tda10048_set_wref() argument
351 t = bw * 10; in tda10048_set_wref()
370 u32 bw) in tda10048_set_invwref() argument
385 do_div(t, bw); in tda10048_set_invwref()
396 u32 bw) in tda10048_set_bandwidth() argument
399 dprintk(1, "%s(bw=%d)\n", __func__, bw); in tda10048_set_bandwidth()
402 switch (bw) { in tda10048_set_bandwidth()
406 tda10048_set_wref(fe, state->sample_freq, bw); in tda10048_set_bandwidth()
407 tda10048_set_invwref(fe, state->sample_freq, bw); in tda10048_set_bandwidth()
414 state->bandwidth = bw; in tda10048_set_bandwidth()
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Dl64781.c139 int bw; in apply_frontend_param() local
143 bw = 8; in apply_frontend_param()
146 bw = 7; in apply_frontend_param()
149 bw = 6; in apply_frontend_param()
191 ddfs_offset_fixed = 0x4000-(ppm<<16)/bw/1000000; in apply_frontend_param()
195 bw & 0xFFFFFF); in apply_frontend_param()
201 spi_bias *= bw; in apply_frontend_param()
Dmt352.c114 u32 bw,value; in mt352_calc_nominal_rate() local
118 bw = 6; in mt352_calc_nominal_rate()
121 bw = 7; in mt352_calc_nominal_rate()
125 bw = 8; in mt352_calc_nominal_rate()
131 value = 64 * bw * (1<<16) / (7 * 8); in mt352_calc_nominal_rate()
134 __func__, bw, adc_clock, value); in mt352_calc_nominal_rate()
Dstb6100_cfg.h46 u32 bw = c->bandwidth_hz; in stb6100_set_frequency() local
54 c->bandwidth_hz = bw; in stb6100_set_frequency()
Dcx24113.c481 u32 bw; in cx24113_set_params() local
483 bw = ((c->symbol_rate/100) * roll_off) / 1000; in cx24113_set_params()
484 bw += (10000000/100) + 5; in cx24113_set_params()
485 bw /= 10; in cx24113_set_params()
486 bw += 1000; in cx24113_set_params()
487 cx24113_set_bandwidth(state, bw); in cx24113_set_params()
491 return cx24113_get_status(fe, &bw); in cx24113_set_params()
Dstb6100_proc.h51 u32 bw = c->bandwidth_hz; in stb6100_set_freq() local
62 c->bandwidth_hz = bw; in stb6100_set_freq()
Ddib7000p.h15 struct dibx000_bandwidth_config *bw; member
53 int (*update_pll)(struct dvb_frontend *fe, struct dibx000_bandwidth_config *bw);
Ddib3000mc.c131 static int dib3000mc_set_timing(struct dib3000mc_state *state, s16 nfft, u32 bw, u8 update_offset) in dib3000mc_set_timing() argument
142 timf *= (bw / 1000); in dib3000mc_set_timing()
154 state->timf = timf / (bw / 1000); in dib3000mc_set_timing()
248 static int dib3000mc_set_bandwidth(struct dib3000mc_state *state, u32 bw) in dib3000mc_set_bandwidth() argument
255 switch (bw) { in dib3000mc_set_bandwidth()
295 dib3000mc_set_timing(state, TRANSMISSION_MODE_2K, bw, 0); in dib3000mc_set_bandwidth()
479 u32 bw = BANDWIDTH_TO_KHZ(ch->bandwidth_hz); in dib3000mc_set_channel_cfg() local
481 dib3000mc_set_bandwidth(state, bw); in dib3000mc_set_channel_cfg()
482 dib3000mc_set_timing(state, ch->transmission_mode, bw, 0); in dib3000mc_set_channel_cfg()
Dstv0900_sw.c593 intp->bw[d] = stv0900_carrier_width(intp->symbol_rate[d], in stv0900_get_demod_cold_lock()
607 intp->bw[d], demod); in stv0900_get_demod_cold_lock()
609 stv0900_set_tuner(fe, tuner_freq, intp->bw[d]); in stv0900_get_demod_cold_lock()
974 intp->bw[demod] = stv0900_carrier_width(srate, in stv0900_track_optimization()
982 intp->bw[demod], in stv0900_track_optimization()
986 intp->bw[demod]); in stv0900_track_optimization()
1500 intp->bw[demod], demod); in stv0900_search_srate_coarse()
1503 intp->bw[demod]); in stv0900_search_srate_coarse()
1847 intp->bw[demod] = 2 * 36000000; in stv0900_algo()
1864 intp->bw[demod] = in stv0900_algo()
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Ddib7000m.h18 struct dibx000_bandwidth_config *bw; member
/linux-4.19.296/drivers/media/usb/dvb-usb-v2/
Dmxl111sf-tuner.c88 u8 bw) in mxl111sf_calc_phy_tune_regs() argument
93 switch (bw) { in mxl111sf_calc_phy_tune_regs()
195 static int mxl1x1sf_tune_rf(struct dvb_frontend *fe, u32 freq, u8 bw) in mxl1x1sf_tune_rf() argument
202 mxl_dbg("(freq = %d, bw = 0x%x)", freq, bw); in mxl1x1sf_tune_rf()
215 reg_ctrl_array = mxl111sf_calc_phy_tune_regs(freq, bw); in mxl1x1sf_tune_rf()
277 u8 bw; in mxl111sf_tuner_set_params() local
284 bw = 0; /* ATSC */ in mxl111sf_tuner_set_params()
287 bw = 1; /* US CABLE */ in mxl111sf_tuner_set_params()
292 bw = 6; in mxl111sf_tuner_set_params()
295 bw = 7; in mxl111sf_tuner_set_params()
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/linux-4.19.296/lib/
Dlogic_pio.c233 #define BUILD_LOGIC_IO(bw, type) \ argument
234 type logic_in##bw(unsigned long addr) \
239 ret = read##bw(PCI_IOBASE + addr); \
252 void logic_out##bw(type value, unsigned long addr) \
255 write##bw(value, PCI_IOBASE + addr); \
267 void logic_ins##bw(unsigned long addr, void *buffer, \
271 reads##bw(PCI_IOBASE + addr, buffer, count); \
284 void logic_outs##bw(unsigned long addr, const void *buffer, \
288 writes##bw(PCI_IOBASE + addr, buffer, count); \
/linux-4.19.296/include/net/
Dregulatory.h241 #define REG_RULE_EXT(start, end, bw, gain, eirp, dfs_cac, reg_flags) \ argument
245 .freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw), \
252 #define REG_RULE(start, end, bw, gain, eirp, reg_flags) \ argument
253 REG_RULE_EXT(start, end, bw, gain, eirp, 0, reg_flags)
/linux-4.19.296/drivers/memory/samsung/
Dexynos-srom.c72 u32 cs, bw; in exynos_srom_configure_bank() local
90 bw = readl_relaxed(srom->reg_base + EXYNOS_SROM_BW); in exynos_srom_configure_bank()
91 bw = (bw & ~(EXYNOS_SROM_BW__CS_MASK << bank)) | (cs << bank); in exynos_srom_configure_bank()
92 writel_relaxed(bw, srom->reg_base + EXYNOS_SROM_BW); in exynos_srom_configure_bank()
/linux-4.19.296/drivers/media/tuners/
Dmxl5007t.c390 enum mxl5007t_bw_mhz bw) in mxl5007t_set_bw_bits() argument
394 switch (bw) { in mxl5007t_set_bw_bits()
416 u32 rf_freq, enum mxl5007t_bw_mhz bw) in mxl5007t_calc_rf_tune_regs() argument
425 mxl5007t_set_bw_bits(state, bw); in mxl5007t_calc_rf_tune_regs()
539 enum mxl5007t_bw_mhz bw) in mxl5007t_tuner_rf_tune() argument
545 rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw); in mxl5007t_tuner_rf_tune()
613 enum mxl5007t_bw_mhz bw; in mxl5007t_set_params() local
621 bw = MxL_BW_6MHz; in mxl5007t_set_params()
625 bw = MxL_BW_6MHz; in mxl5007t_set_params()
632 bw = MxL_BW_6MHz; in mxl5007t_set_params()
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Dtda18271-fe.c87 u32 freq, u32 bw) in tda18271_channel_configuration() argument
706 u32 freq, u32 bw) in tda18271c1_rf_tracking_filter_calibration() argument
740 N = freq + bw / 2; in tda18271c1_rf_tracking_filter_calibration()
753 N = freq + bw / 2 + 1000000; in tda18271c1_rf_tracking_filter_calibration()
897 struct tda18271_std_map_item *map, u32 freq, u32 bw) in tda18271_tune() argument
903 freq, map->if_freq, bw, map->agc_mode, map->std); in tda18271_tune()
917 tda18271c1_rf_tracking_filter_calibration(fe, freq, bw); in tda18271_tune()
923 ret = tda18271_channel_configuration(fe, map, freq, bw); in tda18271_tune()
936 u32 bw = c->bandwidth_hz; in tda18271_set_params() local
948 bw = 6000000; in tda18271_set_params()
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Dr820t.c92 u32 bw; /* in MHz */ member
928 unsigned bw, in r820t_set_tv_standard() argument
979 if (bw <= 6) { in r820t_set_tv_standard()
991 } else if (bw == 7) { in r820t_set_tv_standard()
1071 ((delsys != priv->delsys) || bw != priv->bw)) in r820t_set_tv_standard()
1179 priv->bw = bw; in r820t_set_tv_standard()
1287 unsigned bw, in generic_set_freq() argument
1296 freq / 1000, bw); in generic_set_freq()
1298 rc = r820t_set_tv_standard(priv, bw, type, std, delsys); in generic_set_freq()
2178 unsigned bw; in r820t_set_analog_freq() local
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Dxc5000.c697 u32 bw = fe->dtv_property_cache.bandwidth_hz; in xc5000_tune_digital() local
731 priv->bandwidth = bw; in xc5000_tune_digital()
740 u32 bw = fe->dtv_property_cache.bandwidth_hz; in xc5000_set_digital_params() local
766 if (!bw) in xc5000_set_digital_params()
767 bw = 6000000; in xc5000_set_digital_params()
774 switch (bw) { in xc5000_set_digital_params()
797 if (bw <= 6000000) { in xc5000_set_digital_params()
801 } else if (bw <= 7000000) { in xc5000_set_digital_params()
811 b, bw); in xc5000_set_digital_params()
1086 static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) in xc5000_get_bandwidth() argument
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Dmax2165.c146 static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw) in max2165_set_bandwidth() argument
150 if (bw == 8000000) in max2165_set_bandwidth()
301 static int max2165_get_bandwidth(struct dvb_frontend *fe, u32 *bw) in max2165_get_bandwidth() argument
306 *bw = priv->bandwidth; in max2165_get_bandwidth()
Dtda18218.c124 u32 bw = c->bandwidth_hz; in tda18218_set_params() local
150 if (bw <= 6000000) { in tda18218_set_params()
153 } else if (bw <= 7000000) { in tda18218_set_params()
Dtuner-simple.c846 const u32 bw) in simple_dvb_configure() argument
878 simple_set_dvb(fe, buf, delsys, freq, bw); in simple_dvb_configure()
892 u32 bw = c->bandwidth_hz; in simple_dvb_calc_regs() local
899 frequency = simple_dvb_configure(fe, buf+1, delsys, c->frequency, bw); in simple_dvb_calc_regs()
915 u32 bw = c->bandwidth_hz; in simple_dvb_set_params() local
929 frequency = simple_dvb_configure(fe, buf+1, delsys, freq, bw); in simple_dvb_set_params()
936 priv->bandwidth = bw; in simple_dvb_set_params()
/linux-4.19.296/drivers/media/dvb-frontends/cxd2880/
Dcxd2880_top.c688 enum cxd2880_dtv_bandwidth bw = CXD2880_DTV_BW_1_7_MHZ; in cxd2880_set_ber_per_period_t() local
702 bw = priv->dvbt_tune_param.bandwidth; in cxd2880_set_ber_per_period_t()
716 pre_ber_rate = 63000000 * bw * (info.constellation * 2 + 2) / in cxd2880_set_ber_per_period_t()
719 post_ber_rate = 1000 * cr_table[info.rate_hp] * bw * in cxd2880_set_ber_per_period_t()
723 ucblock_rate = 875 * cr_table[info.rate_hp] * bw * in cxd2880_set_ber_per_period_t()
745 63000000 * bw * (info.constellation * 2 + 2) / in cxd2880_set_ber_per_period_t()
748 post_ber_rate = 1000 * cr_table[info.rate_lp] * bw * in cxd2880_set_ber_per_period_t()
753 bw * (info.constellation * 2 + 2) / in cxd2880_set_ber_per_period_t()
757 63000000 * bw * 2 / denominator_tbl[info.guard]; in cxd2880_set_ber_per_period_t()
759 post_ber_rate = 1000 * cr_table[info.rate_hp] * bw * 2 / in cxd2880_set_ber_per_period_t()
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