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Searched refs:cache_line_size (Results 1 – 15 of 15) sorted by relevance

/linux-4.19.296/include/linux/
Dcache.h79 #define cache_line_size() L1_CACHE_BYTES macro
Dpci-epf.h47 u8 cache_line_size; member
Dpci_hotplug.h125 u8 cache_line_size; member
/linux-4.19.296/drivers/pci/endpoint/
Dpci-ep-cfs.c329 PCI_EPF_HEADER_R(cache_line_size)
330 PCI_EPF_HEADER_W_u8(cache_line_size)
347 CONFIGFS_ATTR(pci_epf_, cache_line_size);
/linux-4.19.296/include/uapi/rdma/
Dmlx5-abi.h127 __u32 cache_line_size; member
/linux-4.19.296/drivers/pci/
Dpci-acpi.c137 hpx->t0->cache_line_size = fields[2].integer.value; in decode_type0_hpx_record()
316 hpp->t0->cache_line_size = fields[0].integer.value; in acpi_run_hpp()
Dprobe.c1871 .cache_line_size = 8,
1890 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp->cache_line_size); in program_hpp_type0()
/linux-4.19.296/drivers/pci/controller/
Dpci-mvebu.c97 u8 cache_line_size; member
494 bridge->cache_line_size = 0x10; in mvebu_sw_pci_bridge_init()
529 bridge->latency_timer << 8 | bridge->cache_line_size; in mvebu_sw_pci_bridge_read()
Dpcie-cadence-ep.c61 hdr->cache_line_size); in cdns_pcie_ep_write_header()
Dpcie-rockchip-ep.c150 rockchip_pcie_write(rockchip, hdr->cache_line_size, in rockchip_pcie_ep_write_header()
/linux-4.19.296/drivers/edac/
Di7core_edac.c1987 const int cache_line_size = 64; in set_sdram_scrub_rate() local
1995 cache_line_size * 1000000; in set_sdram_scrub_rate()
2027 const u32 cache_line_size = 64; in get_sdram_scrub_rate() local
2047 1000000 * cache_line_size; in get_sdram_scrub_rate()
Dthunderx_edac.c340 unsigned int cline_size = cache_line_size(); in inject_ecc_fn()
411 unsigned int cline_size = cache_line_size(); in thunderx_lmc_inject_ecc_write()
/linux-4.19.296/block/
Dblk-flush.c593 rq_sz = round_up(rq_sz + cmd_size, cache_line_size()); in blk_alloc_flush_queue()
Dblk-mq.c2066 cache_line_size()); in blk_mq_alloc_rqs()
/linux-4.19.296/drivers/pci/controller/dwc/
Dpcie-designware-ep.c90 hdr->cache_line_size); in dw_pcie_ep_write_header()