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Searched refs:clk_divider_flags (Results 1 – 11 of 11) sorted by relevance

/linux-4.19.296/drivers/clk/
Dclk-divider.c456 u8 clk_divider_flags, const struct clk_div_table *table, in _register_divider() argument
464 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) { in _register_divider()
477 if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) in _register_divider()
489 div->flags = clk_divider_flags; in _register_divider()
520 u8 clk_divider_flags, spinlock_t *lock) in clk_register_divider() argument
525 width, clk_divider_flags, NULL, lock); in clk_register_divider()
547 u8 clk_divider_flags, spinlock_t *lock) in clk_hw_register_divider() argument
550 width, clk_divider_flags, NULL, lock); in clk_hw_register_divider()
571 u8 clk_divider_flags, const struct clk_div_table *table, in clk_register_divider_table() argument
577 width, clk_divider_flags, table, lock); in clk_register_divider_table()
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Dclk-fractional-divider.c134 u8 clk_divider_flags, spinlock_t *lock) in clk_hw_register_fractional_divider() argument
158 fd->flags = clk_divider_flags; in clk_hw_register_fractional_divider()
176 u8 clk_divider_flags, spinlock_t *lock) in clk_register_fractional_divider() argument
181 reg, mshift, mwidth, nshift, nwidth, clk_divider_flags, in clk_register_fractional_divider()
Dclk-npcm7xx.c168 u8 clk_divider_flags; member
184 u8 clk_divider_flags; member
630 div_data->clk_divider_flags, &npcm7xx_clk_lock); in npcm7xx_clk_init()
Dclk-stm32f4.c676 u8 clk_divider_flags, const struct clk_div_table *table, in clk_register_pll_div() argument
699 pll_div->div.flags = clk_divider_flags; in clk_register_pll_div()
/linux-4.19.296/drivers/clk/ti/
Ddivider.c282 u8 clk_divider_flags, in _register_divider() argument
289 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) { in _register_divider()
312 div->flags = clk_divider_flags; in _register_divider()
627 u8 clk_divider_flags = 0; in of_ti_divider_clk_setup() local
637 &clk_divider_flags, &width, &shift, &latch)) in of_ti_divider_clk_setup()
641 shift, width, latch, clk_divider_flags, table); in of_ti_divider_clk_setup()
Dadpll.c246 u8 clk_divider_flags) in ti_adpll_init_divider() argument
258 reg, shift, width, clk_divider_flags, in ti_adpll_init_divider()
/linux-4.19.296/include/linux/
Dclk-provider.h461 u8 clk_divider_flags, spinlock_t *lock);
465 u8 clk_divider_flags, spinlock_t *lock);
469 u8 clk_divider_flags, const struct clk_div_table *table,
474 u8 clk_divider_flags, const struct clk_div_table *table,
620 u8 clk_divider_flags, spinlock_t *lock);
624 u8 clk_divider_flags, spinlock_t *lock);
/linux-4.19.296/drivers/clk/tegra/
Dclk-divider.c131 unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, in tegra_clk_register_divider() argument
156 divider->flags = clk_divider_flags; in tegra_clk_register_divider()
Dclk.h88 unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mtk.h176 unsigned char clk_divider_flags; member
Dclk-mtk.c275 mcd->div_width, mcd->clk_divider_flags, lock); in mtk_clk_register_dividers()