/linux-4.19.296/drivers/clk/ti/ |
D | clockdomain.c | 51 clk_hw_get_name(hw)); in omap2_clkops_enable_clkdm() 57 __func__, clk_hw_get_name(hw)); in omap2_clkops_enable_clkdm() 63 __func__, clk_hw_get_name(hw), clk->clkdm_name, ret); in omap2_clkops_enable_clkdm() 85 clk_hw_get_name(hw)); in omap2_clkops_disable_clkdm() 91 __func__, clk_hw_get_name(hw)); in omap2_clkops_disable_clkdm()
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D | dpll3xxx.c | 72 clk_name = clk_hw_get_name(&clk->hw); in _omap3_wait_dpll_status() 148 pr_debug("clock: locking DPLL %s\n", clk_hw_get_name(&clk->hw)); in _omap3_noncore_dpll_lock() 196 clk_hw_get_name(&clk->hw)); in _omap3_noncore_dpll_bypass() 226 pr_debug("clock: stopping DPLL %s\n", clk_hw_get_name(&clk->hw)); in _omap3_noncore_dpll_stop() 455 __func__, clk_hw_get_name(hw), in omap3_noncore_dpll_enable() 592 clk_hw_get_name(hw), rate); in omap3_noncore_dpll_set_rate()
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D | clkt_dflt.c | 114 idlest_val, clk_hw_get_name(&clk->hw)); in _omap2_module_wait_ready() 221 __func__, clk_hw_get_name(hw), in omap2_dflt_clk_enable()
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D | clkctrl.c | 146 __func__, clk_hw_get_name(hw), in _omap4_clkctrl_clk_enable() 168 pr_err("%s: failed to enable\n", clk_hw_get_name(hw)); in _omap4_clkctrl_clk_enable() 198 pr_err("%s: failed to disable\n", clk_hw_get_name(hw)); in _omap4_clkctrl_clk_disable()
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D | apll.c | 53 clk_name = clk_hw_get_name(&clk->hw); in dra7_apll_enable() 289 clk_hw_get_name(&clk->hw)); in omap2_apll_enable()
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/linux-4.19.296/drivers/clk/ux500/ |
D | clk-prcmu.c | 46 clk_hw_get_name(hw)); in clk_prcmu_unprepare() 104 (char *)clk_hw_get_name(hw), in clk_prcmu_opp_prepare() 108 __func__, clk_hw_get_name(hw)); in clk_prcmu_opp_prepare() 117 (char *)clk_hw_get_name(hw)); in clk_prcmu_opp_prepare() 132 clk_hw_get_name(hw)); in clk_prcmu_opp_unprepare() 138 (char *)clk_hw_get_name(hw)); in clk_prcmu_opp_unprepare() 154 __func__, clk_hw_get_name(hw)); in clk_prcmu_opp_volt_prepare() 177 clk_hw_get_name(hw)); in clk_prcmu_opp_volt_unprepare()
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/linux-4.19.296/drivers/clk/sunxi-ng/ |
D | ccu_frac.c | 70 pr_debug("%s: Read fractional\n", clk_hw_get_name(&common->hw)); in ccu_frac_helper_read_rate() 76 clk_hw_get_name(&common->hw), cf->rates[0], cf->rates[1]); in ccu_frac_helper_read_rate() 81 clk_hw_get_name(&common->hw), reg, cf->select); in ccu_frac_helper_read_rate()
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D | ccu_sdm.c | 117 clk_hw_get_name(&common->hw)); in ccu_sdm_helper_read_rate() 123 clk_hw_get_name(&common->hw)); in ccu_sdm_helper_read_rate() 128 clk_hw_get_name(&common->hw), reg); in ccu_sdm_helper_read_rate()
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D | ccu_common.c | 116 i, clk_hw_get_name(hw)); in sunxi_ccu_probe()
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/linux-4.19.296/drivers/clk/ |
D | clk-xgene.c | 79 pr_debug("%s pll %s\n", clk_hw_get_name(hw), in xgene_clk_pll_is_enabled() 127 clk_hw_get_name(hw), fvco / nout, parent_rate, in xgene_clk_pll_recalc_rate() 469 pr_debug("%s clock enabled\n", clk_hw_get_name(hw)); in xgene_clk_enable() 477 clk_hw_get_name(hw), in xgene_clk_enable() 488 clk_hw_get_name(hw), in xgene_clk_enable() 509 pr_debug("%s clock disabled\n", clk_hw_get_name(hw)); in xgene_clk_disable() 535 pr_debug("%s clock checking\n", clk_hw_get_name(hw)); in xgene_clk_is_enabled() 538 pr_debug("%s clock is %s\n", clk_hw_get_name(hw), in xgene_clk_is_enabled() 561 clk_hw_get_name(hw), in xgene_clk_recalc_rate() 567 clk_hw_get_name(hw), parent_rate, parent_rate); in xgene_clk_recalc_rate() [all …]
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D | clk-si5351.c | 442 __func__, clk_hw_get_name(hw), in si5351_pll_recalc_rate() 500 __func__, clk_hw_get_name(hw), a, b, c, in si5351_pll_round_rate() 529 __func__, clk_hw_get_name(hw), in si5351_pll_set_rate() 640 __func__, clk_hw_get_name(hw), in si5351_msynth_recalc_rate() 753 __func__, clk_hw_get_name(hw), a, b, c, divby4, in si5351_msynth_round_rate() 785 __func__, clk_hw_get_name(hw), in si5351_msynth_set_rate() 921 __func__, clk_hw_get_name(&drvdata->clkout[num].hw), in _si5351_clkout_reset_pll() 1079 __func__, clk_hw_get_name(hw), (1 << rdiv), in si5351_clkout_round_rate() 1130 __func__, clk_hw_get_name(hw), (1 << rdiv), in si5351_clkout_set_rate()
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/linux-4.19.296/drivers/clk/qcom/ |
D | clk-regmap-mux-div.c | 27 const char *name = clk_hw_get_name(&md->clkr.hw); in mux_div_set_src_div() 63 const char *name = clk_hw_get_name(&md->clkr.hw); in mux_div_get_src_div() 166 const char *name = clk_hw_get_name(hw); in mux_div_get_parent() 208 const char *name = clk_hw_get_name(hw); in mux_div_recalc_rate()
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D | clk-branch.c | 70 const char *name = clk_hw_get_name(&br->clkr.hw); in clk_branch_wait()
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/linux-4.19.296/drivers/clk/berlin/ |
D | berlin2-pll.c | 53 pr_warn("%s has zero rfdiv\n", clk_hw_get_name(hw)); in berlin2_pll_recalc_rate() 62 clk_hw_get_name(hw), vcodivsel); in berlin2_pll_recalc_rate()
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D | bg2.c | 581 clk_names[SYSPLL] = clk_hw_get_name(hw); in berlin2_clock_setup() 589 clk_names[MEMPLL] = clk_hw_get_name(hw); in berlin2_clock_setup() 597 clk_names[CPUPLL] = clk_hw_get_name(hw); in berlin2_clock_setup()
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/linux-4.19.296/drivers/clk/st/ |
D | clkgen-fsyn.c | 285 clk_hw_get_name(hw), __func__); in quadfs_pll_fs660c32_recalc_rate() 333 __func__, clk_hw_get_name(hw), in quadfs_pll_fs660c32_round_rate() 358 __func__, clk_hw_get_name(hw), in quadfs_pll_fs660c32_set_rate() 516 pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); in quadfs_fsynth_enable() 541 pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); in quadfs_fsynth_disable() 558 __func__, clk_hw_get_name(hw), nsb); in quadfs_fsynth_is_enabled() 752 clk_hw_get_name(hw), __func__); in quadfs_recalc_rate() 755 pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); in quadfs_recalc_rate() 768 __func__, clk_hw_get_name(hw), in quadfs_round_rate()
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D | clk-flexgen.c | 58 pr_debug("%s: flexgen output enabled\n", clk_hw_get_name(hw)); in flexgen_enable() 72 pr_debug("%s: flexgen output disabled\n", clk_hw_get_name(hw)); in flexgen_disable()
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/linux-4.19.296/drivers/clk/samsung/ |
D | clk-pll.c | 217 drate, clk_hw_get_name(hw)); in samsung_pll35xx_set_rate() 329 drate, clk_hw_get_name(hw)); in samsung_pll36xx_set_rate() 448 drate, clk_hw_get_name(hw)); in samsung_pll45xx_set_rate() 500 __func__, clk_hw_get_name(hw)); in samsung_pll45xx_set_rate() 599 drate, clk_hw_get_name(hw)); in samsung_pll46xx_set_rate() 659 __func__, clk_hw_get_name(hw)); in samsung_pll46xx_set_rate() 817 drate, clk_hw_get_name(hw)); in samsung_s3c2410_pll_set_rate() 1013 drate, clk_hw_get_name(hw)); in samsung_pll2550xx_set_rate() 1113 drate, clk_hw_get_name(hw)); in samsung_pll2650x_set_rate() 1207 drate, clk_hw_get_name(hw)); in samsung_pll2650xx_set_rate()
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/linux-4.19.296/drivers/clk/rockchip/ |
D | clk-inverter.c | 53 __func__, degrees, clk_hw_get_name(hw)); in rockchip_inv_set_phase()
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D | clk-pll.c | 407 clk_hw_get_name(hw)); in rockchip_rk3066_pll_recalc_rate() 486 __func__, clk_hw_get_name(hw), drate, prate); in rockchip_rk3066_pll_set_rate() 492 drate, clk_hw_get_name(hw)); in rockchip_rk3066_pll_set_rate() 547 __func__, clk_hw_get_name(hw), drate, rate->nr, cur.nr, in rockchip_rk3066_pll_init() 552 __func__, clk_hw_get_name(hw)); in rockchip_rk3066_pll_init()
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D | clk-mmc-phase.c | 151 clk_hw_get_name(hw), degrees, delay_num, in rockchip_mmc_set_phase()
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/linux-4.19.296/drivers/clk/nxp/ |
D | clk-lpc32xx.c | 522 clk_hw_get_name(hw), in clk_pll_recalc_rate() 531 clk_hw_get_name(hw), in clk_pll_recalc_rate() 595 pr_debug("%s: %lu/%lu\n", clk_hw_get_name(hw), *parent_rate, rate); in clk_hclk_pll_round_rate() 624 clk_hw_get_name(hw), rate); in clk_hclk_pll_round_rate() 642 clk_hw_get_name(hw), rate, m, n, p); in clk_hclk_pll_round_rate() 645 clk_hw_get_name(hw), rate, m, n, p, o); in clk_hclk_pll_round_rate() 657 pr_debug("%s: %lu/%lu\n", clk_hw_get_name(hw), *parent_rate, rate); in clk_usb_pll_round_rate() 807 pr_debug("%s: 0x%x\n", clk_hw_get_name(hw), clk->enable); in clk_usb_enable()
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/linux-4.19.296/drivers/clk/microchip/ |
D | clk-core.c | 428 __func__, clk_hw_get_name(hw), req->rate); in roclk_determine_rate() 433 clk_hw_get_name(hw), req->rate, in roclk_determine_rate() 434 clk_hw_get_name(best_parent_clk), best_parent_rate, in roclk_determine_rate() 460 pr_err("%s: poll failed, clk active\n", clk_hw_get_name(hw)); in roclk_set_parent() 883 clk_hw_get_name(hw), nosc, cosc); in sclk_set_parent()
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/linux-4.19.296/drivers/clk/sirf/ |
D | clk-common.c | 301 const char *name = clk_hw_get_name(hw); in dmn_clk_get_parent() 316 const char *name = clk_hw_get_name(hw); in dmn_clk_set_parent() 359 const char *name = clk_hw_get_name(hw); in dmn_clk_round_rate() 382 const char *name = clk_hw_get_name(hw); in dmn_clk_set_rate()
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/linux-4.19.296/drivers/clk/pistachio/ |
D | clk-pll.c | 203 const char *name = clk_hw_get_name(hw); in pll_gf40lp_frac_set_rate() 360 const char *name = clk_hw_get_name(hw); in pll_gf40lp_laint_set_rate()
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