Searched refs:cmd_status (Results 1 – 7 of 7) sorted by relevance
246 u16 cmd_status = shpc_readw(ctrl, CMD_STATUS); in is_ctrl_busy() local247 return cmd_status & 0x1; in is_ctrl_busy()296 u16 cmd_status; in shpc_write_cmd() local325 cmd_status = hpc_check_cmd_status(slot->ctrl); in shpc_write_cmd()326 if (cmd_status) { in shpc_write_cmd()328 cmd, cmd_status); in shpc_write_cmd()339 u16 cmd_status = shpc_readw(ctrl, CMD_STATUS) & 0x000F; in hpc_check_cmd_status() local341 switch (cmd_status >> 1) { in hpc_check_cmd_status()358 retval = cmd_status; in hpc_check_cmd_status()
184 volatile u16 cmd_status; member201 CMD_STATUS = offsetof(struct ctrl_reg, cmd_status),
94 u16 cmd_status; member117 if (i2c_dev->cmd_status & ISR_NACK_ADDR) in wmt_check_status()120 if (i2c_dev->cmd_status & ISR_SCL_TIMEOUT) in wmt_check_status()333 i2c_dev->cmd_status = readw(i2c_dev->base + REG_ISR); in wmt_i2c_isr()334 writew(i2c_dev->cmd_status, i2c_dev->base + REG_ISR); in wmt_i2c_isr()
166 int cmd_status = dc_i2c_cmd_status(i2c); in dc_i2c_irq() local174 if (cmd_status == II_CMD_STATUS_ACK_BAD in dc_i2c_irq()175 || cmd_status == II_CMD_STATUS_ABORT) { in dc_i2c_irq()
198 uint8_t cmd_status; member383 uint8_t cmd_status; member
250 uint32_t cmd_status; /*responses will have this set*/ member
253 __u32 cmd_status:8; member