| /linux-4.19.296/drivers/clk/tegra/ |
| D | clk-divider.c | 32 static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate, in get_div() argument
37 div = div_frac_get(rate, parent_rate, divider->width, in get_div()
38 divider->frac_width, divider->flags); in get_div()
49 struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); in clk_frac_div_recalc_rate() local
54 reg = readl_relaxed(divider->reg) >> divider->shift; in clk_frac_div_recalc_rate()
55 div = reg & div_mask(divider); in clk_frac_div_recalc_rate()
57 mul = get_mul(divider); in clk_frac_div_recalc_rate()
70 struct tegra_clk_frac_div *divider = to_clk_frac_div(hw); in clk_frac_div_round_rate() local
77 div = get_div(divider, rate, output_rate); in clk_frac_div_round_rate()
81 mul = get_mul(divider); in clk_frac_div_round_rate()
[all …]
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| D | clk-periph.c | 51 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_recalc_rate()
63 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_round_rate()
75 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_set_rate()
172 periph->divider.reg = div ? (clk_base + offset) : NULL; in _tegra_clk_register_periph()
182 periph->divider.hw.clk = div ? clk : NULL; in _tegra_clk_register_periph()
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| /linux-4.19.296/drivers/clk/qcom/ |
| D | clk-regmap-divider.c | 29 struct clk_regmap_div *divider = to_clk_regmap_div(hw); in div_round_ro_rate() local
30 struct clk_regmap *clkr = ÷r->clkr; in div_round_ro_rate()
33 regmap_read(clkr->regmap, divider->reg, &val); in div_round_ro_rate()
34 val >>= divider->shift; in div_round_ro_rate()
35 val &= BIT(divider->width) - 1; in div_round_ro_rate()
37 return divider_ro_round_rate(hw, rate, prate, NULL, divider->width, in div_round_ro_rate()
44 struct clk_regmap_div *divider = to_clk_regmap_div(hw); in div_round_rate() local
46 return divider_round_rate(hw, rate, prate, NULL, divider->width, in div_round_rate()
53 struct clk_regmap_div *divider = to_clk_regmap_div(hw); in div_set_rate() local
54 struct clk_regmap *clkr = ÷r->clkr; in div_set_rate()
[all …]
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| /linux-4.19.296/drivers/clk/mvebu/ |
| D | dove-divider.c | 53 unsigned int divider; in dove_get_divider() local
59 divider = val & ~(~0 << dc->div_bit_size); in dove_get_divider()
62 divider = dc->divider_table[divider]; in dove_get_divider()
64 return divider; in dove_get_divider()
70 unsigned int divider, max; in dove_calc_divider() local
72 divider = DIV_ROUND_CLOSEST(parent_rate, rate); in dove_calc_divider()
78 if (divider == dc->divider_table[i]) { in dove_calc_divider()
79 divider = i; in dove_calc_divider()
88 if (set && (divider == 0 || divider >= max)) in dove_calc_divider()
90 if (divider >= max) in dove_calc_divider()
[all …]
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| /linux-4.19.296/drivers/clk/rockchip/ |
| D | clk-half-divider.c | 24 struct clk_divider *divider = to_clk_divider(hw); in clk_half_divider_recalc_rate() local
27 val = clk_readl(divider->reg) >> divider->shift; in clk_half_divider_recalc_rate()
28 val &= div_mask(divider->width); in clk_half_divider_recalc_rate()
97 struct clk_divider *divider = to_clk_divider(hw); in clk_half_divider_round_rate() local
101 divider->width, in clk_half_divider_round_rate()
102 divider->flags); in clk_half_divider_round_rate()
110 struct clk_divider *divider = to_clk_divider(hw); in clk_half_divider_set_rate() local
117 value = min_t(unsigned int, value, div_mask(divider->width)); in clk_half_divider_set_rate()
119 if (divider->lock) in clk_half_divider_set_rate()
120 spin_lock_irqsave(divider->lock, flags); in clk_half_divider_set_rate()
[all …]
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| /linux-4.19.296/drivers/clk/ti/ |
| D | divider.c | 42 static unsigned int _get_maxdiv(struct clk_omap_divider *divider) in _get_maxdiv() argument
44 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_maxdiv()
45 return div_mask(divider); in _get_maxdiv()
46 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) in _get_maxdiv()
47 return 1 << div_mask(divider); in _get_maxdiv()
48 if (divider->table) in _get_maxdiv()
49 return _get_table_maxdiv(divider->table); in _get_maxdiv()
50 return div_mask(divider) + 1; in _get_maxdiv()
64 static unsigned int _get_div(struct clk_omap_divider *divider, unsigned int val) in _get_div() argument
66 if (divider->flags & CLK_DIVIDER_ONE_BASED) in _get_div()
[all …]
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| D | clk-dra7-atl.c | 57 u32 divider; /* Cached divider value */ member
93 cdesc->divider - 1); in atl_clk_enable()
128 return parent_rate / cdesc->divider; in atl_clk_recalc_rate()
134 unsigned divider; in atl_clk_round_rate() local
136 divider = (*parent_rate + rate / 2) / rate; in atl_clk_round_rate()
137 if (divider > DRA7_ATL_DIVIDER_MASK + 1) in atl_clk_round_rate()
138 divider = DRA7_ATL_DIVIDER_MASK + 1; in atl_clk_round_rate()
140 return *parent_rate / divider; in atl_clk_round_rate()
147 u32 divider; in atl_clk_set_rate() local
153 divider = ((parent_rate + rate / 2) / rate) - 1; in atl_clk_set_rate()
[all …]
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| /linux-4.19.296/drivers/clk/mxs/ |
| D | clk-div.c | 28 struct clk_divider divider; member
36 struct clk_divider *divider = to_clk_divider(hw); in to_clk_div() local
38 return container_of(divider, struct clk_div, divider); in to_clk_div()
46 return div->ops->recalc_rate(&div->divider.hw, parent_rate); in clk_div_recalc_rate()
54 return div->ops->round_rate(&div->divider.hw, rate, prate); in clk_div_round_rate()
63 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
96 div->divider.reg = reg; in mxs_clk_div()
97 div->divider.shift = shift; in mxs_clk_div()
98 div->divider.width = width; in mxs_clk_div()
99 div->divider.flags = CLK_DIVIDER_ONE_BASED; in mxs_clk_div()
[all …]
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| /linux-4.19.296/drivers/clk/imx/ |
| D | clk-fixup-div.c | 30 struct clk_divider divider; member
37 struct clk_divider *divider = to_clk_divider(hw); in to_clk_fixup_div() local
39 return container_of(divider, struct clk_fixup_div, divider); in to_clk_fixup_div()
47 return fixup_div->ops->recalc_rate(&fixup_div->divider.hw, parent_rate); in clk_fixup_div_recalc_rate()
55 return fixup_div->ops->round_rate(&fixup_div->divider.hw, rate, prate); in clk_fixup_div_round_rate()
63 unsigned int divider, value; in clk_fixup_div_set_rate() local
67 divider = parent_rate / rate; in clk_fixup_div_set_rate()
70 value = divider - 1; in clk_fixup_div_set_rate()
115 fixup_div->divider.reg = reg; in imx_clk_fixup_divider()
116 fixup_div->divider.shift = shift; in imx_clk_fixup_divider()
[all …]
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| /linux-4.19.296/drivers/clk/ |
| D | clk-divider.c | 138 struct clk_divider *divider = to_clk_divider(hw); in clk_divider_recalc_rate() local
141 val = clk_readl(divider->reg) >> divider->shift; in clk_divider_recalc_rate()
142 val &= clk_div_mask(divider->width); in clk_divider_recalc_rate()
144 return divider_recalc_rate(hw, parent_rate, val, divider->table, in clk_divider_recalc_rate()
145 divider->flags, divider->width); in clk_divider_recalc_rate()
370 struct clk_divider *divider = to_clk_divider(hw); in clk_divider_round_rate() local
373 if (divider->flags & CLK_DIVIDER_READ_ONLY) { in clk_divider_round_rate()
376 val = clk_readl(divider->reg) >> divider->shift; in clk_divider_round_rate()
377 val &= clk_div_mask(divider->width); in clk_divider_round_rate()
379 return divider_ro_round_rate(hw, rate, prate, divider->table, in clk_divider_round_rate()
[all …]
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| D | clk-cdce925.c | 380 unsigned long divider; in cdce925_calc_divider() local
387 divider = DIV_ROUND_CLOSEST(parent_rate, rate); in cdce925_calc_divider()
388 if (divider > 0x7F) in cdce925_calc_divider()
389 divider = 0x7F; in cdce925_calc_divider()
391 return (u16)divider; in cdce925_calc_divider()
441 u16 divider = cdce925_calc_divider(rate, l_parent_rate); in cdce925_clk_round_rate() local
443 if (l_parent_rate / divider != rate) { in cdce925_clk_round_rate()
445 divider = cdce925_calc_divider(rate, l_parent_rate); in cdce925_clk_round_rate()
449 if (divider) in cdce925_clk_round_rate()
450 return (long)(l_parent_rate / divider); in cdce925_clk_round_rate()
[all …]
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| D | clk-xgene.c | 578 u32 divider; in xgene_clk_set_rate() local
588 divider_save = divider = parent_rate / rate; /* Rounded down */ in xgene_clk_set_rate()
589 divider &= (1 << pclk->param.reg_divider_width) - 1; in xgene_clk_set_rate()
590 divider <<= pclk->param.reg_divider_shift; in xgene_clk_set_rate()
597 data |= divider; in xgene_clk_set_rate()
617 u32 divider; in xgene_clk_round_rate() local
623 divider = parent_rate / rate; /* Rounded down */ in xgene_clk_round_rate()
625 divider = 1; in xgene_clk_round_rate()
628 return parent_rate / divider; in xgene_clk_round_rate()
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| /linux-4.19.296/drivers/clk/davinci/ |
| D | pll.c | 244 struct clk_divider *divider; in davinci_pll_div_register() local
255 divider = kzalloc(sizeof(*divider), GFP_KERNEL); in davinci_pll_div_register()
256 if (!divider) { in davinci_pll_div_register()
261 divider->reg = reg; in davinci_pll_div_register()
262 divider->shift = DIV_RATIO_SHIFT; in davinci_pll_div_register()
263 divider->width = DIV_RATIO_WIDTH; in davinci_pll_div_register()
266 divider->flags |= CLK_DIVIDER_READ_ONLY; in davinci_pll_div_register()
271 NULL, NULL, ÷r->hw, divider_ops, in davinci_pll_div_register()
281 kfree(divider); in davinci_pll_div_register()
579 struct clk_divider *divider; in davinci_pll_obsclk_register() local
[all …]
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| /linux-4.19.296/drivers/i2c/busses/ |
| D | i2c-mxs.c | 691 uint32_t divider; in mxs_i2c_derive_timing() local
696 divider = DIV_ROUND_UP(clk, speed); in mxs_i2c_derive_timing()
698 if (divider < 25) { in mxs_i2c_derive_timing()
703 divider = 25; in mxs_i2c_derive_timing()
707 clk / divider / 1000, clk / divider % 1000); in mxs_i2c_derive_timing()
708 } else if (divider > 1897) { in mxs_i2c_derive_timing()
713 divider = 1897; in mxs_i2c_derive_timing()
717 clk / divider / 1000, clk / divider % 1000); in mxs_i2c_derive_timing()
736 low_count = DIV_ROUND_CLOSEST(divider * 13, (13 + 6)); in mxs_i2c_derive_timing()
737 high_count = DIV_ROUND_CLOSEST(divider * 6, (13 + 6)); in mxs_i2c_derive_timing()
[all …]
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| D | i2c-bcm2835.c | 92 u32 divider, redl, fedl; in bcm2835_i2c_set_divider() local
94 divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), in bcm2835_i2c_set_divider()
101 if (divider & 1) in bcm2835_i2c_set_divider()
102 divider++; in bcm2835_i2c_set_divider()
103 if ((divider < BCM2835_I2C_CDIV_MIN) || in bcm2835_i2c_set_divider()
104 (divider > BCM2835_I2C_CDIV_MAX)) { in bcm2835_i2c_set_divider()
109 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider); in bcm2835_i2c_set_divider()
116 fedl = max(divider / 16, 1u); in bcm2835_i2c_set_divider()
122 redl = max(divider / 4, 1u); in bcm2835_i2c_set_divider()
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| D | i2c-mpc.c | 79 u16 divider; member
285 u32 divider; in mpc_i2c_get_fdr_52xx() local
295 divider = mpc5xxx_get_bus_frequency(node) / clock; in mpc_i2c_get_fdr_52xx()
306 if (div->divider >= divider) in mpc_i2c_get_fdr_52xx()
310 *real_clk = mpc5xxx_get_bus_frequency(node) / div->divider; in mpc_i2c_get_fdr_52xx()
472 u32 divider; in mpc_i2c_get_fdr_8xxx() local
481 divider = fsl_get_sys_freq() / clock / prescaler; in mpc_i2c_get_fdr_8xxx()
484 fsl_get_sys_freq(), clock, divider); in mpc_i2c_get_fdr_8xxx()
492 if (div->divider >= divider) in mpc_i2c_get_fdr_8xxx()
496 *real_clk = fsl_get_sys_freq() / prescaler / div->divider; in mpc_i2c_get_fdr_8xxx()
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| /linux-4.19.296/drivers/cpufreq/ |
| D | armada-37xx-cpufreq.c | 100 u8 divider[LOAD_LEVEL_NR]; member
110 {.cpu_freq_max = 1000*1000*1000, .divider = {1, 2, 4, 5} },
111 {.cpu_freq_max = 800*1000*1000, .divider = {1, 2, 3, 4} },
112 {.cpu_freq_max = 600*1000*1000, .divider = {2, 4, 5, 6} },
133 struct regmap *clk_base, u8 *divider) in armada37xx_cpufreq_dvfs_setup() argument
169 val |= divider[load_lvl] << ARMADA_37XX_NB_TBG_DIV_OFF; in armada37xx_cpufreq_dvfs_setup()
325 freq = dvfs->cpu_freq_max / dvfs->divider[load_level]; in armada37xx_cpufreq_avs_setup()
496 armada37xx_cpufreq_dvfs_setup(nb_pm_base, nb_clk_base, dvfs->divider); in armada37xx_cpufreq_driver_init()
502 freq = base_frequency / dvfs->divider[load_lvl]; in armada37xx_cpufreq_driver_init()
530 freq = base_frequency / dvfs->divider[load_lvl]; in armada37xx_cpufreq_driver_init()
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| /linux-4.19.296/drivers/media/dvb-frontends/ |
| D | stv6110.c | 236 u32 nbsteps, divider, psd2, freq; in stv6110_get_frequency() local
241 divider = (priv->regs[RSTV6110_TUNING2] & 0x0f) << 8; in stv6110_get_frequency()
242 divider += priv->regs[RSTV6110_TUNING1]; in stv6110_get_frequency()
249 freq = divider * (priv->mclk / 1000); in stv6110_get_frequency()
262 u32 divider, ref, p, presc, i, result_freq, vco_freq; in stv6110_set_frequency() local
310 divider = (((frequency * 1000) + (ref >> 1)) / ref); in stv6110_set_frequency()
318 priv->regs[RSTV6110_TUNING2] |= (((divider) >> 8) & 0x0f); in stv6110_set_frequency()
321 priv->regs[RSTV6110_TUNING1] = (divider & 0xff); in stv6110_set_frequency()
339 vco_freq = divider * ((priv->mclk / 1000) / ((1 << (r_div_opt + 1)))); in stv6110_set_frequency()
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| /linux-4.19.296/drivers/media/rc/ |
| D | ir-xmp-decoder.c | 82 int divider, i; in ir_xmp_decode() local
100 divider = (n[3] - XMP_NIBBLE_PREFIX) / 15 - 2000; in ir_xmp_decode()
101 if (divider < 50) { in ir_xmp_decode()
103 divider); in ir_xmp_decode()
110 n[i] = (n[i] - XMP_NIBBLE_PREFIX) / divider; in ir_xmp_decode()
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| /linux-4.19.296/drivers/clk/nxp/ |
| D | clk-lpc32xx.c | 951 struct lpc32xx_clk_div *divider = to_lpc32xx_div(hw); in clk_divider_recalc_rate() local
954 regmap_read(clk_regmap, divider->reg, &val); in clk_divider_recalc_rate()
956 val >>= divider->shift; in clk_divider_recalc_rate()
957 val &= div_mask(divider->width); in clk_divider_recalc_rate()
959 return divider_recalc_rate(hw, parent_rate, val, divider->table, in clk_divider_recalc_rate()
960 divider->flags, divider->width); in clk_divider_recalc_rate()
966 struct lpc32xx_clk_div *divider = to_lpc32xx_div(hw); in clk_divider_round_rate() local
970 if (divider->flags & CLK_DIVIDER_READ_ONLY) { in clk_divider_round_rate()
971 regmap_read(clk_regmap, divider->reg, &bestdiv); in clk_divider_round_rate()
972 bestdiv >>= divider->shift; in clk_divider_round_rate()
[all …]
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| /linux-4.19.296/drivers/clk/bcm/ |
| D | clk-bcm2835.c | 783 struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); in bcm2835_pll_divider_is_on() local
784 struct bcm2835_cprman *cprman = divider->cprman; in bcm2835_pll_divider_is_on()
785 const struct bcm2835_pll_divider_data *data = divider->data; in bcm2835_pll_divider_is_on()
805 struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); in bcm2835_pll_divider_off() local
806 struct bcm2835_cprman *cprman = divider->cprman; in bcm2835_pll_divider_off()
807 const struct bcm2835_pll_divider_data *data = divider->data; in bcm2835_pll_divider_off()
821 struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); in bcm2835_pll_divider_on() local
822 struct bcm2835_cprman *cprman = divider->cprman; in bcm2835_pll_divider_on()
823 const struct bcm2835_pll_divider_data *data = divider->data; in bcm2835_pll_divider_on()
841 struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw); in bcm2835_pll_divider_set_rate() local
[all …]
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| /linux-4.19.296/drivers/clk/berlin/ |
| D | berlin2-div.c | 180 u32 divsw, div3sw, divider = 1; in berlin2_div_recalc_rate() local
192 divider = 3; in berlin2_div_recalc_rate()
195 divider = 1; in berlin2_div_recalc_rate()
202 divider = clk_div[reg]; in berlin2_div_recalc_rate()
208 return parent_rate / divider; in berlin2_div_recalc_rate()
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| D | berlin2-avpll.c | 255 u32 reg, div_av2, div_av3, divider = 1; in berlin2_avpll_channel_recalc_rate() local
271 divider = reg & VCO_SYNC1_MASK; in berlin2_avpll_channel_recalc_rate()
287 divider *= div_hdmi[reg & 0x3]; in berlin2_avpll_channel_recalc_rate()
301 divider *= div_av1[reg & 0x3]; in berlin2_avpll_channel_recalc_rate()
318 divider *= div_av2; in berlin2_avpll_channel_recalc_rate()
336 do_div(freq, divider); in berlin2_avpll_channel_recalc_rate()
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| /linux-4.19.296/drivers/iio/imu/inv_mpu6050/ |
| D | inv_mpu_iio.h | 101 u8 divider; member
268 ((st)->chip_config.divider + 1)
272 #define INV_MPU6050_DIVIDER_TO_FIFO_RATE(divider) \ argument
273 (INV_MPU6050_INTERNAL_FREQ_HZ / ((divider) + 1))
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| /linux-4.19.296/drivers/clk/sunxi/ |
| D | clk-sunxi.c | 962 struct clk_divider *divider; in sunxi_divs_clk_setup() local
1065 divider = kzalloc(sizeof(*divider), GFP_KERNEL); in sunxi_divs_clk_setup()
1066 if (!divider) in sunxi_divs_clk_setup()
1071 divider->reg = reg; in sunxi_divs_clk_setup()
1072 divider->shift = data->div[i].shift; in sunxi_divs_clk_setup()
1073 divider->width = SUNXI_DIVISOR_WIDTH; in sunxi_divs_clk_setup()
1074 divider->flags = flags; in sunxi_divs_clk_setup()
1075 divider->lock = &clk_lock; in sunxi_divs_clk_setup()
1076 divider->table = data->div[i].table; in sunxi_divs_clk_setup()
1078 rate_hw = ÷r->hw; in sunxi_divs_clk_setup()
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