Searched refs:divm_shift (Results 1 – 6 of 6) sorted by relevance
| /linux-4.19.296/drivers/clk/tegra/ |
| D | clk-tegra124.c | 137 .divm_shift = 0,
233 .divm_shift = 0,
307 .divm_shift = 0,
395 .divm_shift = 0,
456 .divm_shift = 0,
495 .divm_shift = 0,
523 .divm_shift = 0,
588 .divm_shift = 0,
705 .divm_shift = 0,
|
| D | clk-tegra114.c | 151 .divm_shift = 0,
213 .divm_shift = 0,
284 .divm_shift = 0,
333 .divm_shift = 0,
459 .divm_shift = 0,
557 .divm_shift = 0,
586 .divm_shift = 0,
|
| D | clk-pll.c | 263 #define divm_shift(p) (p)->params->div_nmp->divm_shift macro
267 #define divm_mask_shifted(p) (divm_mask(p) << divm_shift(p))
281 .divm_shift = PLL_BASE_DIVM_SHIFT,
676 val |= (cfg->m << divm_shift(pll)) | in _update_pll_mnp()
707 cfg->m = (val >> div_nmp->divm_shift) & divm_mask(pll); in _get_pll_mnp()
969 val |= sel.m << divm_shift(pll); in clk_plle_enable()
1005 divm = (val >> pll->params->div_nmp->divm_shift) & (divm_mask(pll)); in clk_plle_recalc_rate()
1605 val |= sel.m << divm_shift(pll); in clk_plle_tegra114_enable()
1876 .divm_shift = PLLE_BASE_DIVM_SHIFT,
2067 val = m << divm_shift(pll); in tegra_clk_register_pllre()
[all …]
|
| D | clk-tegra210.c | 1332 #define divm_shift(p) ((p)->params->div_nmp->divm_shift) macro
1336 #define divm_mask_shifted(p) (divm_mask(p) << divm_shift(p))
1495 .divm_shift = 0,
1617 .divm_shift = 0,
1663 .divm_shift = 0,
1732 .divm_shift = 0,
1809 .divm_shift = 0,
1884 .divm_shift = 0,
1921 .divm_shift = 0,
1954 .divm_shift = 0,
[all …]
|
| D | clk.h | 153 u8 divm_shift; member
|
| D | clk-tegra30.c | 383 .divm_shift = 0,
|