/linux-4.19.296/drivers/irqchip/ |
D | irq-eznps.c | 59 unsigned int irq = irqd_to_hwirq(irqd); in nps400_irq_mask() 69 unsigned int irq = irqd_to_hwirq(irqd); in nps400_irq_unmask() 78 unsigned int __maybe_unused irq = irqd_to_hwirq(irqd); in nps400_irq_eoi_global() 90 unsigned int __maybe_unused irq = irqd_to_hwirq(irqd); in nps400_irq_ack()
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D | irq-ftintc010.c | 60 mask &= ~BIT(irqd_to_hwirq(d)); in ft010_irq_mask() 70 mask |= BIT(irqd_to_hwirq(d)); in ft010_irq_unmask() 78 writel(BIT(irqd_to_hwirq(d)), FT010_IRQ_CLEAR(f->base)); in ft010_irq_ack() 84 int offset = irqd_to_hwirq(d); in ft010_irq_set_type()
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D | irq-sun4i.c | 41 unsigned int irq = irqd_to_hwirq(irqd); in sun4i_irq_ack() 51 unsigned int irq = irqd_to_hwirq(irqd); in sun4i_irq_mask() 63 unsigned int irq = irqd_to_hwirq(irqd); in sun4i_irq_unmask()
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D | irq-renesas-intc-irqpin.c | 194 int hw_irq = irqd_to_hwirq(d); in intc_irqpin_irq_enable() 203 int hw_irq = irqd_to_hwirq(d); in intc_irqpin_irq_disable() 212 int hw_irq = irqd_to_hwirq(d); in intc_irqpin_shared_irq_enable() 223 int hw_irq = irqd_to_hwirq(d); in intc_irqpin_shared_irq_disable() 234 int irq = p->irq[irqd_to_hwirq(d)].requested_irq; in intc_irqpin_irq_enable_force() 248 int irq = p->irq[irqd_to_hwirq(d)].requested_irq; in intc_irqpin_irq_disable_force() 277 return intc_irqpin_set_sense(p, irqd_to_hwirq(d), in intc_irqpin_irq_set_type() 284 int hw_irq = irqd_to_hwirq(d); in intc_irqpin_irq_set_wake()
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D | irq-clps711x.c | 97 irq_hw_number_t hwirq = irqd_to_hwirq(d); in clps711x_intc_eoi() 104 irq_hw_number_t hwirq = irqd_to_hwirq(d); in clps711x_intc_mask() 115 irq_hw_number_t hwirq = irqd_to_hwirq(d); in clps711x_intc_unmask()
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D | irq-armada-370-xp.c | 174 irq_hw_number_t hwirq = irqd_to_hwirq(d); in armada_370_xp_irq_mask() 186 irq_hw_number_t hwirq = irqd_to_hwirq(d); in armada_370_xp_irq_unmask() 315 irq_hw_number_t hwirq = irqd_to_hwirq(d); in armada_xp_set_affinity()
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D | irq-renesas-irqc.c | 91 int hw_irq = irqd_to_hwirq(d); in irqc_irq_set_type() 110 int hw_irq = irqd_to_hwirq(d); in irqc_irq_set_wake()
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/linux-4.19.296/drivers/gpio/ |
D | gpio-mpc8xxx.c | 134 | mpc_pin2mask(irqd_to_hwirq(d))); in mpc8xxx_irq_unmask() 149 & ~mpc_pin2mask(irqd_to_hwirq(d))); in mpc8xxx_irq_mask() 160 mpc_pin2mask(irqd_to_hwirq(d))); in mpc8xxx_irq_ack() 175 | mpc_pin2mask(irqd_to_hwirq(d))); in mpc8xxx_irq_set_type() 183 & ~mpc_pin2mask(irqd_to_hwirq(d))); in mpc8xxx_irq_set_type() 198 unsigned long gpio = irqd_to_hwirq(d); in mpc512x_irq_set_type()
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D | gpio-ath79.c | 74 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_unmask() 85 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_mask() 96 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_enable() 108 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_disable() 121 u32 mask = BIT(irqd_to_hwirq(data)); in ath79_gpio_irq_set_type()
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D | gpio-ftgpio010.c | 55 writel(BIT(irqd_to_hwirq(d)), g->base + GPIO_INT_CLR); in ftgpio_gpio_ack_irq() 65 val &= ~BIT(irqd_to_hwirq(d)); in ftgpio_gpio_mask_irq() 76 val |= BIT(irqd_to_hwirq(d)); in ftgpio_gpio_unmask_irq() 84 u32 mask = BIT(irqd_to_hwirq(d)); in ftgpio_gpio_set_irq_type()
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D | gpio-em.c | 91 em_gio_write(p, GIO_IDS, BIT(irqd_to_hwirq(d))); in em_gio_irq_disable() 98 em_gio_write(p, GIO_IEN, BIT(irqd_to_hwirq(d))); in em_gio_irq_enable() 106 ret = gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d)); in em_gio_irq_reqres() 110 irqd_to_hwirq(d)); in em_gio_irq_reqres() 120 gpiochip_unlock_as_irq(&p->gpio_chip, irqd_to_hwirq(d)); in em_gio_irq_relres() 145 offset = irqd_to_hwirq(d); in em_gio_irq_set_type()
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D | gpio-sprd.c | 120 u32 offset = irqd_to_hwirq(data); in sprd_gpio_irq_mask() 128 u32 offset = irqd_to_hwirq(data); in sprd_gpio_irq_ack() 136 u32 offset = irqd_to_hwirq(data); in sprd_gpio_irq_unmask() 145 u32 offset = irqd_to_hwirq(data); in sprd_gpio_irq_set_type()
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D | gpio-pl061.c | 128 int offset = irqd_to_hwirq(d); in pl061_irq_type() 236 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); in pl061_irq_mask() 249 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); in pl061_irq_unmask() 270 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); in pl061_irq_ack()
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D | gpio-ws16c48.c | 246 const unsigned long offset = irqd_to_hwirq(data); in ws16c48_irq_ack() 272 const unsigned long offset = irqd_to_hwirq(data); in ws16c48_irq_mask() 296 const unsigned long offset = irqd_to_hwirq(data); in ws16c48_irq_unmask() 320 const unsigned long offset = irqd_to_hwirq(data); in ws16c48_irq_set_type()
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D | gpio-zx.c | 113 int offset = irqd_to_hwirq(d); in zx_irq_type() 184 u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR); in zx_irq_mask() 199 u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR); in zx_irq_unmask()
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D | gpio-dln2.c | 309 int pin = irqd_to_hwirq(irqd); in dln2_irq_unmask() 318 int pin = irqd_to_hwirq(irqd); in dln2_irq_mask() 327 int pin = irqd_to_hwirq(irqd); in dln2_irq_set_type() 364 int pin = irqd_to_hwirq(irqd); in dln2_irq_bus_unlock()
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D | gpio-merrifield.c | 208 u32 gpio = irqd_to_hwirq(d); in mrfld_irq_ack() 222 u32 gpio = irqd_to_hwirq(d); in mrfld_irq_unmask_mask() 252 u32 gpio = irqd_to_hwirq(d); in mrfld_irq_set_type() 305 u32 gpio = irqd_to_hwirq(d); in mrfld_irq_set_wake()
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D | gpio-pxa.c | 406 unsigned int gpio = irqd_to_hwirq(d); in pxa_gpio_irq_type() 494 unsigned int gpio = irqd_to_hwirq(d); in pxa_ack_muxed_gpio() 503 unsigned int gpio = irqd_to_hwirq(d); in pxa_mask_muxed_gpio() 519 unsigned int gpio = irqd_to_hwirq(d); in pxa_gpio_set_wake() 530 unsigned int gpio = irqd_to_hwirq(d); in pxa_unmask_muxed_gpio()
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D | gpio-lynxpoint.c | 153 u32 hwirq = irqd_to_hwirq(d); in lp_irq_type() 277 u32 hwirq = irqd_to_hwirq(d); in lp_irq_enable() 290 u32 hwirq = irqd_to_hwirq(d); in lp_irq_disable()
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D | gpio-104-dio-48e.c | 297 const unsigned long offset = irqd_to_hwirq(data); in dio48e_irq_mask() 322 const unsigned long offset = irqd_to_hwirq(data); in dio48e_irq_unmask() 347 const unsigned long offset = irqd_to_hwirq(data); in dio48e_irq_set_type()
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D | gpio-eic-sprd.c | 239 u32 offset = irqd_to_hwirq(data); in sprd_eic_irq_mask() 264 u32 offset = irqd_to_hwirq(data); in sprd_eic_irq_unmask() 289 u32 offset = irqd_to_hwirq(data); in sprd_eic_irq_ack() 313 u32 offset = irqd_to_hwirq(data); in sprd_eic_irq_set_type()
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D | gpio-104-idio-16.c | 158 const unsigned long mask = BIT(irqd_to_hwirq(data)); in idio_16_irq_mask() 176 const unsigned long mask = BIT(irqd_to_hwirq(data)); in idio_16_irq_unmask()
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D | gpio-104-idi-48.c | 145 const unsigned offset = irqd_to_hwirq(data); in idi_48_irq_mask() 177 const unsigned offset = irqd_to_hwirq(data); in idi_48_irq_unmask()
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D | gpio-rcar.c | 99 gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d))); in gpio_rcar_irq_disable() 107 gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d))); in gpio_rcar_irq_enable() 149 unsigned int hwirq = irqd_to_hwirq(d); in gpio_rcar_irq_set_type()
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/linux-4.19.296/drivers/pci/controller/ |
D | pci-ftpci100.c | 277 reg |= BIT(irqd_to_hwirq(d) + PCI_CTRL2_INTSTS_SHIFT); in faraday_pci_ack_irq() 288 | BIT(irqd_to_hwirq(d) + PCI_CTRL2_INTMASK_SHIFT)); in faraday_pci_mask_irq() 299 reg |= BIT(irqd_to_hwirq(d) + PCI_CTRL2_INTMASK_SHIFT); in faraday_pci_unmask_irq()
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