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Searched refs:mux_width (Results 1 – 7 of 7) sorted by relevance

/linux-4.19.296/drivers/clk/rockchip/
Dclk-ddr.c29 int mux_width; member
87 val &= GENMASK(ddrclk->mux_width - 1, 0); in rockchip_ddrclk_get_parent()
102 int mux_shift, int mux_width, in rockchip_clk_register_ddrclk() argument
137 ddrclk->mux_width = mux_width; in rockchip_clk_register_ddrclk()
Dclk.h366 int mux_shift, int mux_width,
408 u8 mux_width; member
431 .mux_width = mw, \
489 .mux_width = mw, \
507 .mux_width = mw, \
526 .mux_width = mw, \
597 .mux_width = mw, \
614 .mux_width = w, \
629 .mux_width = w, \
738 .mux_width = mw, \
[all …]
Dclk.c48 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch() argument
69 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_branch()
286 frac_mux->mask = BIT(child->mux_width) - 1; in rockchip_clk_register_frac_branch()
460 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
467 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
499 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
518 list->mux_width, list->mux_flags, in rockchip_clk_register_branches()
552 list->mux_width, list->div_shift, in rockchip_clk_register_branches()
Dclk-half-divider.c162 u8 mux_width, u8 mux_flags, in rockchip_clk_register_halfdiv() argument
183 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_halfdiv()
/linux-4.19.296/drivers/clk/mediatek/
Dclk-mtk.h78 signed char mux_width; member
97 .mux_width = _width, \
119 .mux_width = _width, \
Dclk-cpumux.c76 cpumux->mask = BIT(mux->mux_width) - 1; in mtk_clk_register_cpumux()
Dclk-mtk.c167 mux->mask = BIT(mc->mux_width) - 1; in mtk_clk_register_composite()