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Searched refs:omap3_dpll4_set_rate_and_parent (Results 1 – 3 of 3) sorted by relevance

/linux-4.19.296/drivers/clk/ti/
Dclock.h280 int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
Ddpll.c136 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
Ddpll3xxx.c830 int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, in omap3_dpll4_set_rate_and_parent() function