Home
last modified time | relevance | path

Searched refs:pll_cfg (Results 1 – 3 of 3) sorted by relevance

/linux-4.19.296/drivers/clk/axs10x/
Dpll_clock.c97 const struct axs10x_pll_cfg *pll_cfg; member
161 const struct axs10x_pll_cfg *pll_cfg = clk->pll_cfg; in axs10x_pll_round_rate() local
163 if (pll_cfg[0].rate == 0) in axs10x_pll_round_rate()
166 best_rate = pll_cfg[0].rate; in axs10x_pll_round_rate()
168 for (i = 1; pll_cfg[i].rate != 0; i++) { in axs10x_pll_round_rate()
169 if (abs(rate - pll_cfg[i].rate) < abs(rate - best_rate)) in axs10x_pll_round_rate()
170 best_rate = pll_cfg[i].rate; in axs10x_pll_round_rate()
181 const struct axs10x_pll_cfg *pll_cfg = clk->pll_cfg; in axs10x_pll_set_rate() local
183 for (i = 0; pll_cfg[i].rate != 0; i++) { in axs10x_pll_set_rate()
184 if (pll_cfg[i].rate == rate) { in axs10x_pll_set_rate()
[all …]
Di2s_pll_clock.c117 const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(*prate); in i2s_pll_round_rate() local
120 if (!pll_cfg) { in i2s_pll_round_rate()
125 for (i = 0; pll_cfg[i].rate != 0; i++) in i2s_pll_round_rate()
126 if (pll_cfg[i].rate == rate) in i2s_pll_round_rate()
136 const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(parent_rate); in i2s_pll_set_rate() local
139 if (!pll_cfg) { in i2s_pll_set_rate()
144 for (i = 0; pll_cfg[i].rate != 0; i++) { in i2s_pll_set_rate()
145 if (pll_cfg[i].rate == rate) { in i2s_pll_set_rate()
146 i2s_pll_write(clk, PLL_IDIV_REG, pll_cfg[i].idiv); in i2s_pll_set_rate()
147 i2s_pll_write(clk, PLL_FBDIV_REG, pll_cfg[i].fbdiv); in i2s_pll_set_rate()
[all …]
/linux-4.19.296/drivers/clk/
Dclk-hsdk-pll.c96 const struct hsdk_pll_cfg *pll_cfg; member
107 .pll_cfg = asdt_pll_cfg,
112 .pll_cfg = asdt_pll_cfg,
117 .pll_cfg = hdmi_pll_cfg,
201 const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg; in hsdk_pll_round_rate() local
203 if (pll_cfg[0].rate == 0) in hsdk_pll_round_rate()
206 best_rate = pll_cfg[0].rate; in hsdk_pll_round_rate()
208 for (i = 1; pll_cfg[i].rate != 0; i++) { in hsdk_pll_round_rate()
209 if (abs(rate - pll_cfg[i].rate) < abs(rate - best_rate)) in hsdk_pll_round_rate()
210 best_rate = pll_cfg[i].rate; in hsdk_pll_round_rate()
[all …]