Home
last modified time | relevance | path

Searched refs:pll_mux (Results 1 – 2 of 2) sorted by relevance

/linux-4.19.296/drivers/clk/rockchip/
Dclk-pll.c37 struct clk_mux pll_mux; member
191 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3036_pll_set_params() local
205 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3036_pll_set_params()
207 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3036_pll_set_params()
241 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3036_pll_set_params()
424 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3066_pll_set_params() local
436 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3066_pll_set_params()
438 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
474 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
668 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3399_pll_set_params() local
[all …]
/linux-4.19.296/drivers/clk/socfpga/
Dclk-s10.c15 static const char * const pll_mux[] = { "osc1", "cb-intosc-hs-div2-clk", variable
49 { STRATIX10_MAIN_PLL_CLK, "main_pll", pll_mux, ARRAY_SIZE(pll_mux),
51 { STRATIX10_PERIPH_PLL_CLK, "periph_pll", pll_mux, ARRAY_SIZE(pll_mux),