Searched refs:prediv (Results 1 – 13 of 13) sorted by relevance
| /linux-4.19.296/drivers/media/dvb-frontends/ |
| D | tua6100.c | 70 u32 prediv; in tua6100_set_params() local
113 prediv = (c->frequency * _R_VAL) / (_ri / 1000); in tua6100_set_params()
114 div = prediv / _P_VAL; in tua6100_set_params()
121 reg1[3] |= (prediv - (div*_P_VAL)) & 0x7f; in tua6100_set_params()
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| D | dib7000p.c | 496 u8 loopdiv, prediv; in dib7000p_update_pll() local
500 prediv = reg_1856 & 0x3f; in dib7000p_update_pll()
503 if (loopdiv && bw && (bw->pll_prediv != prediv || bw->pll_ratio != loopdiv)) { in dib7000p_update_pll()
504 …dprintk("Updating pll (prediv: old = %d new = %d ; loopdiv : old = %d new = %d)\n", prediv, bw->p… in dib7000p_update_pll()
513 xtal = (internal / loopdiv) * prediv; in dib7000p_update_pll()
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| D | dib8000.c | 753 u8 loopdiv, prediv, oldprediv = state->cfg.pll->pll_prediv ; in dib8000_update_pll() local
757 prediv = reg_1856 & 0x3f; in dib8000_update_pll()
760 if ((pll == NULL) || (pll->pll_prediv == prediv && in dib8000_update_pll()
764 …dprintk("Updating pll (prediv: old = %d new = %d ; loopdiv : old = %d new = %d)\n", prediv, pll->… in dib8000_update_pll()
778 xtal = 2 * (internal / loopdiv) * prediv; in dib8000_update_pll()
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| /linux-4.19.296/drivers/clk/sunxi-ng/ |
| D | ccu_mux.c | 22 u16 prediv = 1; in ccu_mux_get_prediv() local
31 return common->prediv; in ccu_mux_get_prediv()
44 prediv = cm->fixed_predivs[i].div; in ccu_mux_get_prediv()
56 prediv = div + 1; in ccu_mux_get_prediv()
60 return prediv; in ccu_mux_get_prediv()
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| D | ccu_gate.c | 85 rate /= cg->common.prediv; in ccu_gate_recalc_rate()
97 div = cg->common.prediv; in ccu_gate_round_rate()
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| D | ccu_common.h | 38 u32 prediv; member
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| D | ccu-sun5i.c | 97 .prediv = 8,
171 .prediv = 8,
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| D | ccu-sun4i-a10.c | 95 .prediv = 8,
196 .prediv = 8,
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| D | ccu-sun8i-a83t.c | 485 .prediv = 2,
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| /linux-4.19.296/drivers/clk/pistachio/ |
| D | clk-pll.c | 276 u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; in pll_gf40lp_frac_recalc_rate() local
279 prediv = (val >> PLL_CTRL1_REFDIV_SHIFT) & PLL_CTRL1_REFDIV_MASK; in pll_gf40lp_frac_recalc_rate()
296 rate = do_div_round_closest(rate, (prediv * postdiv1 * postdiv2) << 24); in pll_gf40lp_frac_recalc_rate()
416 u32 val, prediv, fbdiv, postdiv1, postdiv2; in pll_gf40lp_laint_recalc_rate() local
420 prediv = (val >> PLL_CTRL1_REFDIV_SHIFT) & PLL_CTRL1_REFDIV_MASK; in pll_gf40lp_laint_recalc_rate()
428 rate = do_div_round_closest(rate, prediv * postdiv1 * postdiv2); in pll_gf40lp_laint_recalc_rate()
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| /linux-4.19.296/drivers/clk/ |
| D | clk-vt8500.c | 360 u32 *multiplier, u32 *prediv) in vt8500_find_pll_bits() argument
368 *prediv = 1; in vt8500_find_pll_bits()
373 *prediv = 2; in vt8500_find_pll_bits()
375 *prediv = 1; in vt8500_find_pll_bits()
377 *multiplier = rate / (parent_rate / *prediv); in vt8500_find_pll_bits()
378 tclk = (parent_rate / *prediv) * *multiplier; in vt8500_find_pll_bits()
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| D | clk-versaclock5.c | 332 unsigned int prediv, div; in vc5_pfd_recalc_rate() local
334 regmap_read(vc5->regmap, VC5_VCO_CTRL_AND_PREDIV, &prediv); in vc5_pfd_recalc_rate()
337 if (prediv & VC5_VCO_CTRL_AND_PREDIV_BYPASS_PREDIV) in vc5_pfd_recalc_rate()
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| /linux-4.19.296/drivers/clk/keystone/ |
| D | pll.c | 85 u32 mult = 0, prediv, postdiv, val; in clk_pllclk_recalc() local
100 prediv = (val & pll_data->plld_mask); in clk_pllclk_recalc()
113 rate /= (prediv + 1); in clk_pllclk_recalc()
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