Searched refs:reg_type (Results 1 – 8 of 8) sorted by relevance
85 u32 reg_both, reg_level, reg_type; in ftgpio_gpio_set_irq_type() local87 reg_type = readl(g->base + GPIO_INT_TYPE); in ftgpio_gpio_set_irq_type()94 reg_type &= ~mask; in ftgpio_gpio_set_irq_type()99 reg_type &= ~mask; in ftgpio_gpio_set_irq_type()105 reg_type &= ~mask; in ftgpio_gpio_set_irq_type()111 reg_type |= mask; in ftgpio_gpio_set_irq_type()116 reg_type |= mask; in ftgpio_gpio_set_irq_type()124 writel(reg_type, g->base + GPIO_INT_TYPE); in ftgpio_gpio_set_irq_type()
77 enum GPIO_REG reg_type) in gpio_reg() argument83 return priv->reg_base + reg_type * nreg * 4 + reg * 4; in gpio_reg()87 enum GPIO_REG reg_type) in gpio_reg_2bit() argument93 return priv->reg_base + reg_type * nreg * 4 + reg * 4; in gpio_reg_2bit()
89 static inline int to_reg(int gpio, enum ctrl_register reg_type) in to_reg() argument106 if (reg_type == CTRL_IN) { in to_reg()
108 static inline unsigned int to_reg(int gpio, enum ctrl_register reg_type) in to_reg() argument115 if (reg_type == CTRL_IN) in to_reg()
95 __u32 reg_type; /* indicates if id is memory, QP or CQ */ member
84 __u16 reg_type; /* Memory, QP or CQ */ member
664 int (*lldd_write_gpio)(struct sas_ha_struct *, u8 reg_type,
222 enum bpf_reg_type reg_type; member