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Searched refs:set_rate_and_parent (Results 1 – 9 of 9) sorted by relevance

/linux-4.19.296/drivers/clk/ti/
Ddpll.c39 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
62 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
73 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
112 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
124 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
136 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
/linux-4.19.296/drivers/clk/qcom/
Dclk-rcg2.c353 .set_rate_and_parent = clk_rcg2_set_rate_and_parent,
364 .set_rate_and_parent = clk_rcg2_set_floor_rate_and_parent,
490 .set_rate_and_parent = clk_edp_pixel_set_rate_and_parent,
548 .set_rate_and_parent = clk_byte_set_rate_and_parent,
618 .set_rate_and_parent = clk_byte2_set_rate_and_parent,
709 .set_rate_and_parent = clk_pixel_set_rate_and_parent,
796 .set_rate_and_parent = clk_gfx3d_set_rate_and_parent,
935 .set_rate_and_parent = clk_rcg2_shared_set_rate_and_parent,
Dclk-rcg.c846 .set_rate_and_parent = clk_rcg_bypass2_set_rate_and_parent,
858 .set_rate_and_parent = clk_rcg_pixel_set_rate_and_parent,
870 .set_rate_and_parent = clk_rcg_esc_set_rate_and_parent,
894 .set_rate_and_parent = clk_dyn_rcg_set_rate_and_parent,
Dclk-regmap-mux-div.c227 .set_rate_and_parent = mux_div_set_rate_and_parent,
/linux-4.19.296/drivers/clk/
Dclk-composite.c284 clk_composite_ops->set_rate_and_parent = in clk_hw_register_composite()
Dclk.c1834 if (core->ops->set_rate_and_parent) { in clk_change_rate()
1836 core->ops->set_rate_and_parent(core->hw, core->new_rate, in clk_change_rate()
3005 if (core->ops->set_rate_and_parent && in __clk_core_init()
/linux-4.19.296/drivers/clk/mmp/
Dclk-mix.c432 .set_rate_and_parent = mmp_clk_mix_set_rate_and_parent,
/linux-4.19.296/include/linux/
Dclk-provider.h236 int (*set_rate_and_parent)(struct clk_hw *hw, member
/linux-4.19.296/drivers/clk/microchip/
Dclk-core.c558 .set_rate_and_parent = roclk_set_rate_and_parent,