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Searched refs:smbus (Results 1 – 11 of 11) sorted by relevance

/linux-4.19.296/drivers/i2c/busses/
Di2c-pasemi.c60 static inline void reg_write(struct pasemi_smbus *smbus, int reg, int val) in reg_write() argument
62 dev_dbg(&smbus->dev->dev, "smbus write reg %lx val %08x\n", in reg_write()
63 smbus->base + reg, val); in reg_write()
64 outl(val, smbus->base + reg); in reg_write()
67 static inline int reg_read(struct pasemi_smbus *smbus, int reg) in reg_read() argument
70 ret = inl(smbus->base + reg); in reg_read()
71 dev_dbg(&smbus->dev->dev, "smbus read reg %lx val %08x\n", in reg_read()
72 smbus->base + reg, ret); in reg_read()
76 #define TXFIFO_WR(smbus, reg) reg_write((smbus), REG_MTXFIFO, (reg)) argument
77 #define RXFIFO_RD(smbus) reg_read((smbus), REG_MRXFIFO) argument
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Di2c-amd8111.c71 static int amd_ec_wait_write(struct amd_smbus *smbus) in amd_ec_wait_write() argument
75 while ((inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_IBF) && --timeout) in amd_ec_wait_write()
79 dev_warn(&smbus->dev->dev, in amd_ec_wait_write()
87 static int amd_ec_wait_read(struct amd_smbus *smbus) in amd_ec_wait_read() argument
91 while ((~inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_OBF) && --timeout) in amd_ec_wait_read()
95 dev_warn(&smbus->dev->dev, in amd_ec_wait_read()
103 static int amd_ec_read(struct amd_smbus *smbus, unsigned char address, in amd_ec_read() argument
108 status = amd_ec_wait_write(smbus); in amd_ec_read()
111 outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD); in amd_ec_read()
113 status = amd_ec_wait_write(smbus); in amd_ec_read()
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Di2c-nforce2.c82 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
83 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
84 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
85 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
86 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
87 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
89 #define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
92 #define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
144 struct nforce2_smbus *smbus = adap->algo_data; in nforce2_abort() local
163 struct nforce2_smbus *smbus = adap->algo_data; in nforce2_check_status() local
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Di2c-stm32f7.c253 bool smbus; member
1441 } else if (f7_msg->smbus) { in stm32f7_i2c_isr_event()
1451 if (f7_msg->smbus) in stm32f7_i2c_isr_event()
1483 if (f7_msg->smbus) { in stm32f7_i2c_isr_event_thread()
1564 f7_msg->smbus = false; in stm32f7_i2c_xfer()
1612 f7_msg->smbus = true; in stm32f7_i2c_smbus_xfer()
DKconfig194 tristate "Intel Cherry Trail Whiskey Cove PMIC smbus controller"
/linux-4.19.296/drivers/i2c/
DMakefile8 i2c-core-objs := i2c-core-base.o i2c-core-smbus.o
13 obj-$(CONFIG_I2C_SMBUS) += i2c-smbus.o
DKconfig95 will be called i2c-smbus.
/linux-4.19.296/drivers/rtc/
Drtc-rs5c372.c127 unsigned smbus:1; member
155 if (rs5c->smbus) { in rs5c_get_regs()
611 rs5c372->smbus = smbus_mode; in rs5c372_probe()
/linux-4.19.296/drivers/ntb/hw/idt/
DKconfig9 initialisation of EEPROM connected to master smbus of the switch or
/linux-4.19.296/include/trace/events/
Dsmbus.h12 #define TRACE_SYSTEM smbus
/linux-4.19.296/
DMAINTAINERS6859 F: include/linux/i2c-smbus.h