/linux-4.19.296/drivers/media/tuners/ |
D | tda18271-maps.c | 31 u8 val; member 202 { .rfmax = 62000, .val = 0x00 }, 203 { .rfmax = 84000, .val = 0x01 }, 204 { .rfmax = 100000, .val = 0x02 }, 205 { .rfmax = 140000, .val = 0x03 }, 206 { .rfmax = 170000, .val = 0x04 }, 207 { .rfmax = 180000, .val = 0x05 }, 208 { .rfmax = 865000, .val = 0x06 }, 209 { .rfmax = 0, .val = 0x00 }, /* end */ 213 { .rfmax = 61100, .val = 0x74 }, [all …]
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D | qt1010.c | 21 static int qt1010_readreg(struct qt1010_priv *priv, u8 reg, u8 *val) in qt1010_readreg() argument 27 .flags = I2C_M_RD, .buf = val, .len = 1 }, in qt1010_readreg() 39 static int qt1010_writereg(struct qt1010_priv *priv, u8 reg, u8 val) in qt1010_writereg() argument 41 u8 buf[2] = { reg, val }; in qt1010_writereg() 132 rd[2].val = reg05; in qt1010_set_params() 135 rd[4].val = (freq + QT1010_OFFSET) / FREQ1; in qt1010_set_params() 138 if (mod1 < 8000000) rd[6].val = 0x1d; in qt1010_set_params() 139 else rd[6].val = 0x1c; in qt1010_set_params() 142 if (mod1 < 1*FREQ2) rd[7].val = 0x09; /* +0 MHz */ in qt1010_set_params() 143 else if (mod1 < 2*FREQ2) rd[7].val = 0x08; /* +4 MHz */ in qt1010_set_params() [all …]
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/linux-4.19.296/include/asm-generic/ |
D | percpu.h | 74 #define raw_cpu_generic_to_op(pcp, val, op) \ argument 76 *raw_cpu_ptr(&(pcp)) op val; \ 79 #define raw_cpu_generic_add_return(pcp, val) \ argument 83 *__p += val; \ 148 #define this_cpu_generic_to_op(pcp, val, op) \ argument 152 raw_cpu_generic_to_op(pcp, val, op); \ 157 #define this_cpu_generic_add_return(pcp, val) \ argument 162 __ret = raw_cpu_generic_add_return(pcp, val); \ 212 #define raw_cpu_write_1(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument 215 #define raw_cpu_write_2(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument [all …]
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/linux-4.19.296/include/sound/ |
D | emu8000_reg.h | 122 #define EMU8000_CPF_WRITE(emu, chan, val) \ argument 123 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(0, (chan)), (val)) 124 #define EMU8000_PTRX_WRITE(emu, chan, val) \ argument 125 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (chan)), (val)) 126 #define EMU8000_CVCF_WRITE(emu, chan, val) \ argument 127 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(2, (chan)), (val)) 128 #define EMU8000_VTFT_WRITE(emu, chan, val) \ argument 129 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(3, (chan)), (val)) 130 #define EMU8000_PSST_WRITE(emu, chan, val) \ argument 131 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(6, (chan)), (val)) [all …]
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/linux-4.19.296/include/linux/ |
D | iopoll.h | 43 #define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \ argument 50 (val) = op(addr); \ 55 (val) = op(addr); \ 81 #define readx_poll_timeout_atomic(op, addr, val, cond, delay_us, timeout_us) \ argument 87 (val) = op(addr); \ 92 (val) = op(addr); \ 102 #define readb_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument 103 readx_poll_timeout(readb, addr, val, cond, delay_us, timeout_us) 105 #define readb_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument 106 readx_poll_timeout_atomic(readb, addr, val, cond, delay_us, timeout_us) [all …]
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D | virtio_byteorder.h | 16 static inline u16 __virtio16_to_cpu(bool little_endian, __virtio16 val) in __virtio16_to_cpu() argument 19 return le16_to_cpu((__force __le16)val); in __virtio16_to_cpu() 21 return be16_to_cpu((__force __be16)val); in __virtio16_to_cpu() 24 static inline __virtio16 __cpu_to_virtio16(bool little_endian, u16 val) in __cpu_to_virtio16() argument 27 return (__force __virtio16)cpu_to_le16(val); in __cpu_to_virtio16() 29 return (__force __virtio16)cpu_to_be16(val); in __cpu_to_virtio16() 32 static inline u32 __virtio32_to_cpu(bool little_endian, __virtio32 val) in __virtio32_to_cpu() argument 35 return le32_to_cpu((__force __le32)val); in __virtio32_to_cpu() 37 return be32_to_cpu((__force __be32)val); in __virtio32_to_cpu() 40 static inline __virtio32 __cpu_to_virtio32(bool little_endian, u32 val) in __cpu_to_virtio32() argument [all …]
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/linux-4.19.296/drivers/media/dvb-frontends/ |
D | lgdt3306a.c | 132 static int lgdt3306a_write_reg(struct lgdt3306a_state *state, u16 reg, u8 val) in lgdt3306a_write_reg() argument 135 u8 buf[] = { reg >> 8, reg & 0xff, val }; in lgdt3306a_write_reg() 141 dbg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val); in lgdt3306a_write_reg() 156 static int lgdt3306a_read_reg(struct lgdt3306a_state *state, u16 reg, u8 *val) in lgdt3306a_read_reg() argument 164 .flags = I2C_M_RD, .buf = val, .len = 1 }, in lgdt3306a_read_reg() 177 dbg_reg("reg: 0x%04x, val: 0x%02x\n", reg, *val); in lgdt3306a_read_reg() 194 u8 val; in lgdt3306a_set_reg_bit() local 199 ret = lgdt3306a_read_reg(state, reg, &val); in lgdt3306a_set_reg_bit() 203 val &= ~(1 << bit); in lgdt3306a_set_reg_bit() 204 val |= (onoff & 1) << bit; in lgdt3306a_set_reg_bit() [all …]
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D | lg2160.c | 63 static int lg216x_write_reg(struct lg216x_state *state, u16 reg, u8 val) in lg216x_write_reg() argument 66 u8 buf[] = { reg >> 8, reg & 0xff, val }; in lg216x_write_reg() 72 lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val); in lg216x_write_reg() 87 static int lg216x_read_reg(struct lg216x_state *state, u16 reg, u8 *val) in lg216x_read_reg() argument 95 .flags = I2C_M_RD, .buf = val, .len = 1 }, in lg216x_read_reg() 115 u8 val; member 126 ret = lg216x_write_reg(state, regs[i].reg, regs[i].val); in lg216x_write_regs() 136 u8 val; in lg216x_set_reg_bit() local 141 ret = lg216x_read_reg(state, reg, &val); in lg216x_set_reg_bit() 145 val &= ~(1 << bit); in lg216x_set_reg_bit() [all …]
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/linux-4.19.296/lib/ |
D | test_ubsan.c | 10 volatile int val = INT_MAX; in test_ubsan_add_overflow() local 12 val += 2; in test_ubsan_add_overflow() 17 volatile int val = INT_MIN; in test_ubsan_sub_overflow() local 20 val -= val2; in test_ubsan_sub_overflow() 25 volatile int val = INT_MAX / 2; in test_ubsan_mul_overflow() local 27 val *= 3; in test_ubsan_mul_overflow() 32 volatile int val = INT_MIN; in test_ubsan_negate_overflow() local 34 val = -val; in test_ubsan_negate_overflow() 39 volatile int val = 16; in test_ubsan_divrem_overflow() local 42 val /= val2; in test_ubsan_divrem_overflow() [all …]
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D | refcount.c | 63 unsigned int new, val = atomic_read(&r->refs); in refcount_add_not_zero_checked() local 66 if (!val) in refcount_add_not_zero_checked() 69 if (unlikely(val == UINT_MAX)) in refcount_add_not_zero_checked() 72 new = val + i; in refcount_add_not_zero_checked() 73 if (new < val) in refcount_add_not_zero_checked() 76 } while (!atomic_try_cmpxchg_relaxed(&r->refs, &val, new)); in refcount_add_not_zero_checked() 120 unsigned int new, val = atomic_read(&r->refs); in refcount_inc_not_zero_checked() local 123 new = val + 1; in refcount_inc_not_zero_checked() 125 if (!val) in refcount_inc_not_zero_checked() 131 } while (!atomic_try_cmpxchg_relaxed(&r->refs, &val, new)); in refcount_inc_not_zero_checked() [all …]
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D | win_minmax.c | 30 const struct minmax_sample *val) in minmax_subwin_update() argument 32 u32 dt = val->t - m->s[0].t; in minmax_subwin_update() 44 m->s[2] = *val; in minmax_subwin_update() 45 if (unlikely(val->t - m->s[0].t > win)) { in minmax_subwin_update() 48 m->s[2] = *val; in minmax_subwin_update() 55 m->s[2] = m->s[1] = *val; in minmax_subwin_update() 61 m->s[2] = *val; in minmax_subwin_update() 69 struct minmax_sample val = { .t = t, .v = meas }; in minmax_running_max() local 71 if (unlikely(val.v >= m->s[0].v) || /* found new max? */ in minmax_running_max() 72 unlikely(val.t - m->s[2].t > win)) /* nothing left in window? */ in minmax_running_max() [all …]
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/linux-4.19.296/include/linux/mfd/ |
D | ti_am335x_tscadc.h | 51 #define STEPENB(val) ((val) << 0) argument 52 #define ENB(val) (1 << (val)) argument 69 #define STEPCONFIG_MODE(val) ((val) << 0) argument 73 #define STEPCONFIG_AVG(val) ((val) << 2) argument 82 #define STEPCONFIG_INM(val) ((val) << 15) argument 85 #define STEPCONFIG_INP(val) ((val) << 19) argument 92 #define STEPDELAY_OPEN(val) ((val) << 0) argument 95 #define STEPDELAY_SAMPLE(val) ((val) << 24) argument 100 #define STEPCHARGE_RFP(val) ((val) << 12) argument 103 #define STEPCHARGE_INM(val) ((val) << 15) argument [all …]
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/linux-4.19.296/include/trace/events/ |
D | intel-sst.h | 21 TP_PROTO(unsigned int val), 23 TP_ARGS(val), 26 __field( unsigned int, val ) 30 __entry->val = val; 33 TP_printk("0x%8.8x", (unsigned int)__entry->val) 38 TP_PROTO(unsigned int val), 40 TP_ARGS(val) 46 TP_PROTO(unsigned int val), 48 TP_ARGS(val) 54 TP_PROTO(unsigned int offset, unsigned int val), [all …]
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D | asoc.h | 21 TP_PROTO(struct snd_soc_card *card, int val), 23 TP_ARGS(card, val), 27 __field( int, val ) 32 __entry->val = val; 35 TP_printk("card=%s val=%d", __get_str(name), (int)__entry->val) 40 TP_PROTO(struct snd_soc_card *card, int val), 42 TP_ARGS(card, val) 48 TP_PROTO(struct snd_soc_card *card, int val), 50 TP_ARGS(card, val) 89 TP_PROTO(struct snd_soc_dapm_widget *w, int val), [all …]
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/linux-4.19.296/drivers/clk/pistachio/ |
D | clk-pll.c | 86 static inline void pll_writel(struct pistachio_clk_pll *pll, u32 val, u32 reg) in pll_writel() argument 88 writel(val, pll->base + reg); in pll_writel() 111 u32 val; in pll_frac_get_mode() local 113 val = pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_DSMPD; in pll_frac_get_mode() 114 return val ? PLL_MODE_INT : PLL_MODE_FRAC; in pll_frac_get_mode() 120 u32 val; in pll_frac_set_mode() local 122 val = pll_readl(pll, PLL_CTRL3); in pll_frac_set_mode() 124 val |= PLL_FRAC_CTRL3_DSMPD | PLL_FRAC_CTRL3_DACPD; in pll_frac_set_mode() 126 val &= ~(PLL_FRAC_CTRL3_DSMPD | PLL_FRAC_CTRL3_DACPD); in pll_frac_set_mode() 128 pll_writel(pll, val, PLL_CTRL3); in pll_frac_set_mode() [all …]
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/linux-4.19.296/include/dt-bindings/pinctrl/ |
D | omap.h | 59 #define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val) argument 60 #define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) argument 61 #define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) argument 62 #define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val) argument 63 #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) argument 64 #define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) argument 65 #define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument 66 #define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument 67 #define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument 75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) argument [all …]
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/linux-4.19.296/drivers/pci/controller/dwc/ |
D | pcie-artpec6.c | 96 u32 val; in artpec6_pcie_readl() local 98 regmap_read(artpec6_pcie->regmap, offset, &val); in artpec6_pcie_readl() 99 return val; in artpec6_pcie_readl() 102 static void artpec6_pcie_writel(struct artpec6_pcie *artpec6_pcie, u32 offset, u32 val) in artpec6_pcie_writel() argument 104 regmap_write(artpec6_pcie->regmap, offset, val); in artpec6_pcie_writel() 127 u32 val; in artpec6_pcie_establish_link() local 129 val = artpec6_pcie_readl(artpec6_pcie, PCIECFG); in artpec6_pcie_establish_link() 130 val |= PCIECFG_LTSSM_ENABLE; in artpec6_pcie_establish_link() 131 artpec6_pcie_writel(artpec6_pcie, PCIECFG, val); in artpec6_pcie_establish_link() 139 u32 val; in artpec6_pcie_stop_link() local [all …]
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D | pcie-designware.c | 23 int dw_pcie_read(void __iomem *addr, int size, u32 *val) in dw_pcie_read() argument 26 *val = 0; in dw_pcie_read() 31 *val = readl(addr); in dw_pcie_read() 33 *val = readw(addr); in dw_pcie_read() 35 *val = readb(addr); in dw_pcie_read() 37 *val = 0; in dw_pcie_read() 44 int dw_pcie_write(void __iomem *addr, int size, u32 val) in dw_pcie_write() argument 50 writel(val, addr); in dw_pcie_write() 52 writew(val, addr); in dw_pcie_write() 54 writeb(val, addr); in dw_pcie_write() [all …]
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/linux-4.19.296/virt/kvm/arm/hyp/ |
D | vgic-v3-sr.c | 70 static void __hyp_text __gic_v3_set_lr(u64 val, int lr) in __gic_v3_set_lr() argument 74 write_gicreg(val, ICH_LR0_EL2); in __gic_v3_set_lr() 77 write_gicreg(val, ICH_LR1_EL2); in __gic_v3_set_lr() 80 write_gicreg(val, ICH_LR2_EL2); in __gic_v3_set_lr() 83 write_gicreg(val, ICH_LR3_EL2); in __gic_v3_set_lr() 86 write_gicreg(val, ICH_LR4_EL2); in __gic_v3_set_lr() 89 write_gicreg(val, ICH_LR5_EL2); in __gic_v3_set_lr() 92 write_gicreg(val, ICH_LR6_EL2); in __gic_v3_set_lr() 95 write_gicreg(val, ICH_LR7_EL2); in __gic_v3_set_lr() 98 write_gicreg(val, ICH_LR8_EL2); in __gic_v3_set_lr() [all …]
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/linux-4.19.296/drivers/clk/tegra/ |
D | clk-pll.c | 248 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset) argument 249 #define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p) argument 250 #define pll_writel_misc(val, p) pll_writel(val, p->params->misc_reg, p) argument 251 #define pll_override_writel(val, offset, p) writel(val, p->pmc + offset) argument 252 #define pll_writel_sdm_din(val, p) pll_writel(val, p->params->sdm_din_reg, p) argument 253 #define pll_writel_sdm_ctrl(val, p) pll_writel(val, p->params->sdm_ctrl_reg, p) argument 289 u32 val; in clk_pll_enable_lock() local 297 val = pll_readl_misc(pll); in clk_pll_enable_lock() 298 val |= BIT(pll->params->lock_enable_bit_idx); in clk_pll_enable_lock() 299 pll_writel_misc(val, pll); in clk_pll_enable_lock() [all …]
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/linux-4.19.296/include/video/ |
D | vga.h | 207 static inline void vga_io_w (unsigned short port, unsigned char val) in vga_io_w() argument 209 outb_p(val, port); in vga_io_w() 213 unsigned char val) in vga_io_w_fast() argument 215 outw(VGA_OUT16VAL (val, reg), port); in vga_io_w_fast() 223 static inline void vga_mm_w (void __iomem *regbase, unsigned short port, unsigned char val) in vga_mm_w() argument 225 writeb (val, regbase + port); in vga_mm_w() 229 unsigned char reg, unsigned char val) in vga_mm_w_fast() argument 231 writew (VGA_OUT16VAL (val, reg), regbase + port); in vga_mm_w_fast() 242 static inline void vga_w (void __iomem *regbase, unsigned short port, unsigned char val) in vga_w() argument 245 vga_mm_w (regbase, port, val); in vga_w() [all …]
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/linux-4.19.296/drivers/char/hw_random/ |
D | iproc-rng200.c | 59 uint32_t val; in iproc_rng200_restart() local 62 val = ioread32(rng_base + RNG_CTRL_OFFSET); in iproc_rng200_restart() 63 val &= ~RNG_CTRL_RNG_RBGEN_MASK; in iproc_rng200_restart() 64 val |= RNG_CTRL_RNG_RBGEN_DISABLE; in iproc_rng200_restart() 65 iowrite32(val, rng_base + RNG_CTRL_OFFSET); in iproc_rng200_restart() 71 val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET); in iproc_rng200_restart() 72 val |= RBG_SOFT_RESET; in iproc_rng200_restart() 73 iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET); in iproc_rng200_restart() 75 val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET); in iproc_rng200_restart() 76 val |= RNG_SOFT_RESET; in iproc_rng200_restart() [all …]
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/linux-4.19.296/drivers/clk/bcm/ |
D | clk-iproc-pll.c | 163 u32 val = readl(pll->status_base + ctrl->status.offset); in pll_wait_for_lock() local 165 if (val & (1 << ctrl->status.shift)) in pll_wait_for_lock() 174 const u32 offset, u32 val) in iproc_pll_write() argument 178 writel(val, base + offset); in iproc_pll_write() 182 val = readl(base + offset); in iproc_pll_write() 188 u32 val; in __pll_disable() local 191 val = readl(pll->asiu_base + ctrl->asiu.offset); in __pll_disable() 192 val &= ~(1 << ctrl->asiu.en_shift); in __pll_disable() 193 iproc_pll_write(pll, pll->asiu_base, ctrl->asiu.offset, val); in __pll_disable() 197 val = readl(pll->control_base + ctrl->aon.offset); in __pll_disable() [all …]
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/linux-4.19.296/drivers/pci/ |
D | access.c | 78 int where, int size, u32 *val) in pci_generic_config_read() argument 84 *val = ~0; in pci_generic_config_read() 89 *val = readb(addr); in pci_generic_config_read() 91 *val = readw(addr); in pci_generic_config_read() 93 *val = readl(addr); in pci_generic_config_read() 100 int where, int size, u32 val) in pci_generic_config_write() argument 109 writeb(val, addr); in pci_generic_config_write() 111 writew(val, addr); in pci_generic_config_write() 113 writel(val, addr); in pci_generic_config_write() 120 int where, int size, u32 *val) in pci_generic_config_read32() argument [all …]
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/linux-4.19.296/drivers/amba/ |
D | tegra-ahb.c | 157 u32 val; in tegra_ahb_enable_smmu() local 165 val = gizmo_readl(ahb, AHB_ARBITRATION_XBAR_CTRL); in tegra_ahb_enable_smmu() 166 val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE; in tegra_ahb_enable_smmu() 167 gizmo_writel(ahb, val, AHB_ARBITRATION_XBAR_CTRL); in tegra_ahb_enable_smmu() 201 u32 val; in tegra_ahb_gizmo_init() local 203 val = gizmo_readl(ahb, AHB_GIZMO_AHB_MEM); in tegra_ahb_gizmo_init() 204 val |= ENB_FAST_REARBITRATE | IMMEDIATE | DONT_SPLIT_AHB_WR; in tegra_ahb_gizmo_init() 205 gizmo_writel(ahb, val, AHB_GIZMO_AHB_MEM); in tegra_ahb_gizmo_init() 207 val = gizmo_readl(ahb, AHB_GIZMO_USB); in tegra_ahb_gizmo_init() 208 val |= IMMEDIATE; in tegra_ahb_gizmo_init() [all …]
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