1 /* 2 * Copyright (c) 2019, The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef HAL_HWIO_H 18 #define HAL_HWIO_H 19 20 /*=========================================================================== 21 * 22 * HWIO REGISTER INPUT/OUTPUT HEADER FILE 23 * 24 * DESCRIPTION 25 * This interface is a replacement for that represented by 26 * msm<ASIC>reg.h, msm<ASIC>io.h and msm<ASIC>redefs.h. For further background 27 * and documentation on this interface, please see word docs and ppt docs at 28 * 29 * This file, together with msmhwioreg.h, provides a portable interface 30 * from the perspective of chip address file coupling to DMSS register 31 * I/O software. The interface defined by msmhwio.h and msmhwioreg.h 32 * encapsulates register name, size, type and access method. 33 * 34 * msmhwioreg.h is an auto-generated file that may be subsequently edited 35 * by hand to handle arbitrary register and bit field name changes, and 36 * register type and size changes. When hand editing, one does not directly 37 * hand edit msmhwioreg.h or msm<ASIC>reg.h except to cut/paste registers 38 * or bitmasks from msm<ASIC>reg.h to msm<ASIC>reg_port.h or from msmhwioreg.h 39 * to msmhwioreg_port.h. One edits an msmreg.pl input file, possibly named 40 * something like msmreg_port.dat, to add patterns which msmreg.pl matches 41 * during chip address file parsing. If a pattern from input the port.dat input 42 * file is matched, that register or bitmask is not ouput to the register 43 * header files, but is output to the *_port.h versions of the register header 44 * files. This mechanism allows hand edit of register header file without loss 45 * of hand edits on each successive re-parse of chip address file. See msmreg.pl 46 * header comments for more information. 47 * 48 * msmhwioreg.h also handles register access method changes by allowing users 49 * to change a registers I/O functions on a per register basis. By default, 50 * when auto-generated, all register I/O functions are selected from the 51 * inline functions listed below. 52 * 53 * (Note that currently inline functions are not used. This is because 54 * rex_int_lock/rex_int_free are not inline and there the masked IO functions 55 * would not inline since the compiler will not inline a function that calls 56 * a function. The task of figuring out how to inline rex_int_lock has been 57 * deferred. So, for the time being, the functions described below are 58 * implemented as #define marcos.) 59 * 60 * To customize register I/O for a single register, one follows the porting 61 * mechanism mentioned above and changes the input/output function for the 62 * desired register. 63 * 64 * Direct, un-encapsulated, use of register addresses or register header file 65 * components is discouraged. To that end, the interface described here fully 66 * encapsulates all the CAF components including register address, bit field mask, 67 * and bit field shift values in addition to register input and output. 68 * 69 * INLINE byte in_byte(dword addr) 70 * INLINE byte in_byte_masked(dword addr, dword mask) 71 * INLINE void out_byte(dword addr, byte val) 72 * INLINE void out_byte_masked(dword io, dword mask, byte val) 73 * 74 * INLINE word in_word(dword addr) 75 * INLINE word in_word_masked(dword addr, dword mask) 76 * INLINE void out_word(dword addr, word val) 77 * INLINE void out_word_masked(dword io, dword mask, word val) 78 * 79 * INLINE dword in_dword(dword addr) 80 * INLINE dword in_dword_masked(dword addr, dword mask) 81 * INLINE void out_dword(dword addr, dword val) 82 * INLINE void out_dword_masked(dword io, dword mask, dword val) 83 * 84 * Initially, then there is a one-to-one correspondance between the inline 85 * functions above and the macro interface below with the inline functions 86 * intended as implementation detail of the macro interface. Register access 87 * method changes of arbitrary complexity are handled by writing the 88 * appropriate new I/O function and replacing the existing one for the 89 * register under consideration. 90 * 91 * The interface described below takes chip address file (CAF) symbols as input. 92 * Wherever hwiosym, hsio_regsym, or hwio_fldsym appears below, that is 93 * a CAF register or bit field name. 94 * 95 * 96 * #define HWIO_IN(hwiosym) 97 * Perform input on register hwiosym. Replaces MSM_IN, MSM_INH and MSM_INW. 98 * 99 * #define HWIO_INM(hwiosym, m) 100 * Perform masked input on register hwiosym applying mask m. 101 * Replaces MSM_INM, MSM_INHM, and MSM_INWM. 102 * 103 * #define HWIO_INF(hwio_regsym, hwio_fldsym) 104 * Read the value from the given field in the given register. 105 * 106 * #define HWIO_OUT(hwiosym, val) 107 * Write input val on register hwiosym. Replaces MSM_OUT, MSM_OUTH, and 108 * MSM_OUTW. 109 * 110 * #define HWIO_OUTM(hwiosym, mask, val) 111 * Write input val on register hwiosym. Input mask is applied to shadow 112 * memory and val such that only bits in mask are updated on register hwiosym 113 * and shadow memory. Replaces MSM_OUTM, MSM_OUTHM, and MSM_OUTWM. 114 * 115 * #define HWIO_OUTF(hwio_regsym, hwio_fldsym, val) 116 * Set the given field in the given register to the given value. 117 * 118 * #define HWIO_ADDR(hwiosym) 119 * Get the register address of hwiosym. Replaces the unencapulsated use of 120 * of numeric literal HEX constants for register address. 121 * 122 * #define HWIO_RMSK(hwiosym) 123 * Get the mask describing valid bits in register hwiosym. Replaces direct, 124 * unencapsulated use of mask symbol from register header file. 125 * 126 * #define HWIO_RSHFT(hwiosym) 127 * Get the shift value of the least significant bit in register hwiosym.a 128 * Replaces SHIFT_FROM_MASK. 129 * 130 * #define HWIO_FMSK(hwio_regsym, hwio_fldsym) 131 * Get the bit field mask for bit field hwio_fldsym in register hwio_regsym. 132 * Replaces the direct, unencapsulated use of bit field masks from register 133 * header file. 134 * 135 * #define HWIO_SHFT(hwio_regsym, hwio_fldsym) 136 * Get the shift value of the least significant bit of bit field hwio_fldsym 137 * in register hwio_regsym. Replaces SHIFT_FROM_MASK. 138 * 139 *===========================================================================*/ 140 141 /*=========================================================================== 142 * 143 * EDIT HISTORY FOR FILE 144 * 145 * This section contains comments describing changes made to this file. 146 * Notice that changes are listed in reverse chronological order. 147 * 148 * when who what, where, why 149 * -------- --- ---------------------------------------------------------- 150 * 02/01/08 gfr Wrap passed in mask with parenthesis. 151 * 12/06/07 gfr More depreciated MSM macros. 152 * 11/19/07 gfr Added MSM_R macro. 153 * 11/19/07 gfr Removed obselete hwio_interrupts_locked_by_user. 154 * 10/26/07 gfr Fix MSM_SET macro. 155 * 10/10/07 gfr Added mappings for MSM_R_MASKED and some others. 156 * 09/21/07 gfr Added mapping for MSM_W_MASKED_i. 157 * 09/21/07 gfr Merged in changes for WinCE and 7k. 158 * 04/24/07 gfr Support for HWIO_INTLOCK/INTFREE to remove lint warnings. 159 * 04/09/07 gfr Cleanup, compile support for HWIO_INTLOCK/HWIO_INTFREE. 160 * 09/19/06 eav Added HWIO_PHYS, HWIO_PHYSI, HWIO_PHYSI2 161 * 08/28/06 gfr Added HWIO_RMSKI, HWIO_SHDW, HWIO_SHDWI 162 * 06/23/06 gfr Added HWIO_INF, HWIO_INFI, HWIO_OUTF and HWIO_OUTFI 163 * 06/16/05 eav Changed __msmhwio_addri to call HWIO_##hwiosym##_ADDRI 164 * 10/10/02 aks Map MSM_OUTSH() used by the MSM6200, to the equivalent 165 * macro in the MSM6300. 166 * 4/29/02 cr initial revision 167 *===========================================================================*/ 168 169 170 /*=========================================================================== 171 * 172 * INCLUDE FILES 173 * 174 *===========================================================================*/ 175 176 #ifdef FEATURE_WINCE_OAL 177 #include <windows.h> 178 #include <nkintr.h> 179 #endif 180 181 #ifndef _ARM_ASM_ 182 #include "HALcomdef.h" 183 #endif 184 185 186 187 /*=========================================================================== 188 * 189 * EXTERNAL DECLARATIONS 190 * 191 *===========================================================================*/ 192 #ifdef __cplusplus 193 extern "C" { 194 #endif 195 196 #ifndef _ARM_ASM_ 197 extern uint32 rex_int_lock(void); 198 extern uint32 rex_int_free(void); 199 200 uint32 pti_inpdw(uint32 * port); 201 void pti_outpdw(uint32 * port, uint32 val); 202 #endif 203 204 #ifdef __cplusplus 205 } 206 #endif 207 208 209 /* ----------------------------------------------------------------------- 210 ** Macros 211 ** ----------------------------------------------------------------------- */ 212 213 /** 214 @addtogroup macros 215 @{ 216 */ 217 218 /** 219 * Map a base name to the pointer to access the base. 220 * 221 * This macro maps a base name to the pointer to access the base. 222 * This is generally just used internally. 223 * 224 */ 225 #define HWIO_BASE_PTR(base) base##_BASE_PTR 226 227 228 /** 229 * Declare a HWIO base pointer. 230 * 231 * This macro will declare a HWIO base pointer data structure. The pointer 232 * will always be declared as a weak symbol so multiple declarations will 233 * resolve correctly to the same data at link-time. 234 */ 235 #ifdef __ARMCC_VERSION 236 #define DECLARE_HWIO_BASE_PTR(base) __weak uint8 *HWIO_BASE_PTR(base) 237 #else 238 #define DECLARE_HWIO_BASE_PTR(base) uint8 *HWIO_BASE_PTR(base) 239 #endif 240 241 /** 242 @} 243 */ 244 245 246 /** 247 @addtogroup hwio_macros 248 @{ 249 */ 250 251 /** 252 * @name Address Macros 253 * 254 * Macros for getting register addresses. 255 * These macros are used for retrieving the address of a register. 256 * HWIO_ADDR* will return the directly accessible address (virtual or physical based 257 * on environment), HWIO_PHYS* will always return the physical address. 258 * The offset from the base region can be retrieved using HWIO_OFFS*. 259 * The "X" extension is used for explicit addressing where the base address of 260 * the module in question is provided as an argument to the macro. 261 * 262 * @{ 263 */ 264 #define HWIO_ADDR(hwiosym) __msmhwio_addr(hwiosym) 265 #define HWIO_ADDRI(hwiosym, index) __msmhwio_addri(hwiosym, index) 266 #define HWIO_ADDRI2(hwiosym, index1, index2) __msmhwio_addri2(hwiosym, index1, index2) 267 #define HWIO_ADDRI3(hwiosym, index1, index2, index3) __msmhwio_addri3(hwiosym, index1, index2, index3) 268 269 #define HWIO_ADDRX(base, hwiosym) __msmhwio_addrx(base, hwiosym) 270 #define HWIO_ADDRXI(base, hwiosym, index) __msmhwio_addrxi(base, hwiosym, index) 271 #define HWIO_ADDRXI2(base, hwiosym, index1, index2) __msmhwio_addrxi2(base, hwiosym, index1, index2) 272 #define HWIO_ADDRXI3(base, hwiosym, index1, index2, index3) __msmhwio_addrxi3(base, hwiosym, index1, index2, index3) 273 274 275 #define HWIO_PHYS(hwiosym) __msmhwio_phys(hwiosym) 276 #define HWIO_PHYSI(hwiosym, index) __msmhwio_physi(hwiosym, index) 277 #define HWIO_PHYSI2(hwiosym, index1, index2) __msmhwio_physi2(hwiosym, index1, index2) 278 #define HWIO_PHYSI3(hwiosym, index1, index2, index3) __msmhwio_physi3(hwiosym, index1, index2, index3) 279 280 #define HWIO_PHYSX(base, hwiosym) __msmhwio_physx(base, hwiosym) 281 #define HWIO_PHYSXI(base, hwiosym, index) __msmhwio_physxi(base, hwiosym, index) 282 #define HWIO_PHYSXI2(base, hwiosym, index1, index2) __msmhwio_physxi2(base, hwiosym, index1, index2) 283 #define HWIO_PHYSXI3(base, hwiosym, index1, index2, index3) __msmhwio_physxi3(base, hwiosym, index1, index2, index3) 284 285 #define HWIO_OFFS(hwiosym) __msmhwio_offs(hwiosym) 286 #define HWIO_OFFSI(hwiosym, index) __msmhwio_offsi(hwiosym, index) 287 #define HWIO_OFFSI2(hwiosym, index1, index2) __msmhwio_offsi2(hwiosym, index1, index2) 288 #define HWIO_OFFSI3(hwiosym, index1, index2, index3) __msmhwio_offsi3(hwiosym, index1, index2, index3) 289 290 /** @} */ 291 292 293 /*=========================================================================== 294 * 295 * MACRO DECLARATIONS 296 * 297 *===========================================================================*/ 298 299 #define HWIO_POR(io) HWIO_##io##_POR 300 301 /** 302 * @name Input Macros 303 * 304 * These macros are used for reading from a named hardware register. Register 305 * arrays ("indexed") use the macros with the "I" suffix. The "M" suffix 306 * indicates that the input will be masked with the supplied mask. The HWIO_INF* 307 * macros take a field name and will do the appropriate masking and shifting 308 * to return just the value of that field. 309 * The "X" extension is used for explicit addressing where the base address of 310 * the module in question is provided as an argument to the macro. 311 * 312 * Generally you want to use either HWIO_IN or HWIO_INF (with required indexing). 313 * 314 * @{ 315 */ 316 317 #define HWIO_IN(hwiosym) __msmhwio_in(hwiosym) 318 #define HWIO_INI(hwiosym, index) __msmhwio_ini(hwiosym, index) 319 #define HWIO_INI2(hwiosym, index1, index2) __msmhwio_ini2(hwiosym, index1, index2) 320 #define HWIO_INI3(hwiosym, index1, index2, index3) __msmhwio_ini3(hwiosym, index1, index2, index3) 321 322 #define HWIO_INM(hwiosym, mask) __msmhwio_inm(hwiosym, mask) 323 #define HWIO_INMI(hwiosym, index, mask) __msmhwio_inmi(hwiosym, index, mask) 324 #define HWIO_INMI2(hwiosym, index1, index2, mask) __msmhwio_inmi2(hwiosym, index1, index2, mask) 325 #define HWIO_INMI3(hwiosym, index1, index2, index3, mask) __msmhwio_inmi3(hwiosym, index1, index2, index3, mask) 326 327 328 #define HWIO_INF(io, field) (HWIO_INM(io, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 329 #define HWIO_INFI(io, index, field) (HWIO_INMI(io, index, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 330 #define HWIO_INFI2(io, index1, index2, field) (HWIO_INMI2(io, index1, index2, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 331 #define HWIO_INFI3(io, index1, index2, index3, field) (HWIO_INMI3(io, index1, index2, index3, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 332 333 #define HWIO_INX(base, hwiosym) __msmhwio_inx(base, hwiosym) 334 #define HWIO_INXI(base, hwiosym, index) __msmhwio_inxi(base, hwiosym, index) 335 #define HWIO_INXI2(base, hwiosym, index1, index2) __msmhwio_inxi2(base, hwiosym, index1, index2) 336 #define HWIO_INXI3(base, hwiosym, index1, index2, index3) __msmhwio_inxi3(base, hwiosym, index1, index2, index3) 337 338 #define HWIO_INXM(base, hwiosym, mask) __msmhwio_inxm(base, hwiosym, mask) 339 #define HWIO_INXMI(base, hwiosym, index, mask) __msmhwio_inxmi(base, hwiosym, index, mask) 340 #define HWIO_INXMI2(base, hwiosym, index1, index2, mask) __msmhwio_inxmi2(base, hwiosym, index1, index2, mask) 341 #define HWIO_INXMI3(base, hwiosym, index1, index2, index3, mask) __msmhwio_inxmi3(base, hwiosym, index1, index2, index3, mask) 342 343 #define HWIO_INXF(base, io, field) (HWIO_INXM(base, io, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 344 #define HWIO_INXFI(base, io, index, field) (HWIO_INXMI(base, io, index, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 345 #define HWIO_INXFI2(base, io, index1, index2, field) (HWIO_INXMI2(base, io, index1, index2, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 346 #define HWIO_INXFI3(base, io, index1, index2, index3, field) (HWIO_INXMI3(base, io, index1, index2, index3, HWIO_FMSK(io, field)) >> HWIO_SHFT(io, field)) 347 /** @} */ 348 349 350 351 /** 352 * @name Output Macros 353 * 354 * These macros are used for writing to a named hardware register. Register 355 * arrays ("indexed") use the macros with the "I" suffix. The "M" suffix 356 * indicates that the output will be masked with the supplied mask (meaning these 357 * macros do a read first, mask in the supplied data, then write it back). 358 * The "X" extension is used for explicit addressing where the base address of 359 * the module in question is provided as an argument to the macro. 360 * The HWIO_OUTF* macros take a field name and will do the appropriate masking 361 * and shifting to output just the value of that field. 362 * HWIO_OUTV* registers take a named value instead of a numeric value and 363 * do the same masking/shifting as HWIO_OUTF. 364 * 365 * Generally you want to use either HWIO_OUT or HWIO_OUTF (with required indexing). 366 * 367 * @{ 368 */ 369 370 #define HWIO_OUT(hwiosym, val) __msmhwio_out(hwiosym, val) 371 #define HWIO_OUTI(hwiosym, index, val) __msmhwio_outi(hwiosym, index, val) 372 #define HWIO_OUTI2(hwiosym, index1, index2, val) __msmhwio_outi2(hwiosym, index1, index2, val) 373 #define HWIO_OUTI3(hwiosym, index1, index2, index3, val) __msmhwio_outi3(hwiosym, index1, index2, index3, val) 374 375 #define HWIO_OUTM(hwiosym, mask, val) __msmhwio_outm(hwiosym, mask, val) 376 #define HWIO_OUTMI(hwiosym, index, mask, val) __msmhwio_outmi(hwiosym, index, mask, val) 377 #define HWIO_OUTMI2(hwiosym, index1, index2, mask, val) __msmhwio_outmi2(hwiosym, index1, index2, mask, val) 378 #define HWIO_OUTMI3(hwiosym, index1, index2, index3, mask, val) __msmhwio_outmi3(hwiosym, index1, index2, index3, mask, val) 379 380 #define HWIO_OUTF(io, field, val) HWIO_OUTM(io, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 381 #define HWIO_OUTFI(io, index, field, val) HWIO_OUTMI(io, index, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 382 #define HWIO_OUTFI2(io, index1, index2, field, val) HWIO_OUTMI2(io, index1, index2, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 383 #define HWIO_OUTFI3(io, index1, index2, index3, field, val) HWIO_OUTMI3(io, index1, index2, index3, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 384 385 386 //---------------------------------------------------------------------------------------------- 387 //<DVICP> added for Waverider 388 #define HWIO_OUTF2(io, field2, field1, val2, val1) HWIO_OUTM(io, (HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 389 ( (val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 390 #define HWIO_OUTF3(io, field3, field2, field1, val3, val2, val1) HWIO_OUTM(io, (HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 391 ( (val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 392 #define HWIO_OUTF4(io, field4, field3, field2, field1, val4, val3, val2, val1) HWIO_OUTM(io, (HWIO_FMSK(io, field4) |HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 393 ( (val4<<HWIO_SHFT(io, field4))|(val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 394 #define HWIO_OUTF5(io, field5, field4, field3, field2, field1, val5, val4, val3, val2, val1) HWIO_OUTM(io, (HWIO_FMSK(io, field5)|HWIO_FMSK(io, field4)|HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 395 ( (val5<<HWIO_SHFT(io, field5))|(val4<<HWIO_SHFT(io, field4))|(val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 396 #define HWIO_OUTF6(io, field6, field5, field4, field3, field2, field1, val6, val5, val4, val3, val2, val1) HWIO_OUTM(io, (HWIO_FMSK(io, field6)|HWIO_FMSK(io, field5)|HWIO_FMSK(io, field4)|HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 397 ( (val6<<HWIO_SHFT(io, field6))|(val5<<HWIO_SHFT(io, field5))|(val4<<HWIO_SHFT(io, field4))|(val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 398 399 #define HWIO_OUTF2I(io, idx, field2, field1, val2, val1) HWIO_OUTMI(io, idx, (HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 400 ( (val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 401 #define HWIO_OUTF3I(io, idx, field3, field2, field1, val3, val2, val1) HWIO_OUTMI(io, idx, (HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 402 ( (val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 403 #define HWIO_OUTF4I(io, idx, field4, field3, field2, field1, val4, val3, val2, val1) HWIO_OUTMI(io, idx, (HWIO_FMSK(io, field4)|HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 404 ( (val4<<HWIO_SHFT(io, field4))|(val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 405 #define HWIO_OUTF5I(io, idx, field5, field4, field3, field2, field1, val5, val4, val3, val2, val1) HWIO_OUTMI(io, idx, (HWIO_FMSK(io, field5)|HWIO_FMSK(io, field4)|HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 406 ( (val5<<HWIO_SHFT(io, field5))|(val4<<HWIO_SHFT(io, field4))|(val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 407 #define HWIO_OUTF6I(io, idx, field6, field5, field4, field3, field2, field1, val6, val5, val4, val3, val2, val1) HWIO_OUTMI(io, idx, (HWIO_FMSK(io, field6)|HWIO_FMSK(io, field5)|HWIO_FMSK(io, field4)|HWIO_FMSK(io, field3)|HWIO_FMSK(io, field2)|HWIO_FMSK(io, field1)), \ 408 ( (val6<<HWIO_SHFT(io, field6))|(val5<<HWIO_SHFT(io, field5))|(val4<<HWIO_SHFT(io, field4))|(val3<<HWIO_SHFT(io, field3))|(val2<<HWIO_SHFT(io, field2))|(val1<<HWIO_SHFT(io, field1))) ) 409 // ---------------------------------------------------------------------------------------------- 410 411 412 #define HWIO_OUTV(io, field, val) HWIO_OUTM(io, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 413 #define HWIO_OUTVI(io, index, field, val) HWIO_OUTMI(io, index, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 414 #define HWIO_OUTVI2(io, index1, index2, field, val) HWIO_OUTMI2(io, index1, index2, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 415 #define HWIO_OUTVI3(io, index1, index2, index3, field, val) HWIO_OUTMI3(io, index1, index2, index3, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 416 417 #define HWIO_OUTX(base, hwiosym, val) __msmhwio_outx(base, hwiosym, val) 418 #define HWIO_OUTXI(base, hwiosym, index, val) __msmhwio_outxi(base, hwiosym, index, val) 419 #define HWIO_OUTXI2(base, hwiosym, index1, index2, val) __msmhwio_outxi2(base, hwiosym, index1, index2, val) 420 #define HWIO_OUTXI3(base, hwiosym, index1, index2, index3, val) __msmhwio_outxi3(base, hwiosym, index1, index2, index3, val) 421 422 #define HWIO_OUTXM(base, hwiosym, mask, val) __msmhwio_outxm(base, hwiosym, mask, val) 423 #define HWIO_OUTXM2(base, hwiosym, mask1, mask2, val1, val2) __msmhwio_outxm2(base, hwiosym, mask1, mask2, val1, val2) 424 #define HWIO_OUTXM3(base, hwiosym, mask1, mask2, mask3, val1, val2, val3) __msmhwio_outxm3(base, hwiosym, mask1, mask2, mask3, val1, val2, val3) 425 #define HWIO_OUTXM4(base, hwiosym, mask1, mask2, mask3, mask4, val1, val2, val3, val4) __msmhwio_outxm4(base, hwiosym, mask1, mask2, mask3, mask4, val1, val2, val3, val4) 426 #define HWIO_OUTXMI(base, hwiosym, index, mask, val) __msmhwio_outxmi(base, hwiosym, index, mask, val) 427 #define HWIO_OUTXMI2(base, hwiosym, index1, index2, mask, val) __msmhwio_outxmi2(base, hwiosym, index1, index2, mask, val) 428 #define HWIO_OUTXMI3(base, hwiosym, index1, index2, index3, mask, val) __msmhwio_outxmi3(base, hwiosym, index1, index2, index3, mask, val) 429 430 #define HWIO_OUTXF(base, io, field, val) HWIO_OUTXM(base, io, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 431 #define HWIO_OUTX2F(base, io, field1, field2, val1, val2) HWIO_OUTXM2(base, io, HWIO_FMSK(io, field1), HWIO_FMSK(io, field2), (uint32)(val1) << HWIO_SHFT(io, field1), (uint32)(val2) << HWIO_SHFT(io, field2)) 432 #define HWIO_OUTX3F(base, io, field1, field2, field3, val1, val2, val3) HWIO_OUTXM3(base, io, HWIO_FMSK(io, field1), HWIO_FMSK(io, field2), HWIO_FMSK(io, field3),(uint32)(val1) << HWIO_SHFT(io, field1), (uint32)(val2) << HWIO_SHFT(io, field2), (uint32)(val3) << HWIO_SHFT(io, field3) ) 433 #define HWIO_OUTX4F(base, io, field1, field2, field3, field4, val1, val2, val3, val4) HWIO_OUTXM4(base, io, HWIO_FMSK(io, field1), HWIO_FMSK(io, field2), HWIO_FMSK(io, field3), HWIO_FMSK(io, field4), (uint32)(val1) << HWIO_SHFT(io, field1) , (uint32)(val2) << HWIO_SHFT(io, field2), (uint32)(val3) << HWIO_SHFT(io, field3), (uint32)(val4) << HWIO_SHFT(io, field4) ) 434 #define HWIO_OUTXFI(base, io, index, field, val) HWIO_OUTXMI(base, io, index, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 435 #define HWIO_OUTXFI2(base, io, index1, index2, field, val) HWIO_OUTXMI2(base, io, index1, index2, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 436 #define HWIO_OUTXFI3(base, io, index1, index2, index3, field, val) HWIO_OUTXMI3(base, io, index1, index2, index3, HWIO_FMSK(io, field), (uint32)(val) << HWIO_SHFT(io, field)) 437 438 #define HWIO_OUTXV(base, io, field, val) HWIO_OUTXM(base, io, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 439 #define HWIO_OUTXVI(base, io, index, field, val) HWIO_OUTXMI(base, io, index, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 440 #define HWIO_OUTXVI2(base, io, index1, index2, field, val) HWIO_OUTXMI2(base, io, index1, index2, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 441 #define HWIO_OUTXVI3(base, io, index1, index2, index3, field, val) HWIO_OUTXMI3(base, io, index1, index2, index3, HWIO_FMSK(io, field), (uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) 442 /** @} */ 443 444 445 446 /** 447 * @name Shift and Mask Macros 448 * 449 * Macros for getting shift and mask values for fields and registers. 450 * HWIO_RMSK: The mask value for accessing an entire register. For example: 451 * @code 452 * HWIO_RMSK(REG) -> 0xFFFFFFFF 453 * @endcode 454 * HWIO_RSHFT: The right-shift value for an entire register (rarely necessary).\n 455 * HWIO_SHFT: The right-shift value for accessing a field in a register. For example: 456 * @code 457 * HWIO_SHFT(REG, FLD) -> 8 458 * @endcode 459 * HWIO_FMSK: The mask value for accessing a field in a register. For example: 460 * @code 461 * HWIO_FMSK(REG, FLD) -> 0xFF00 462 * @endcode 463 * HWIO_VAL: The value for a field in a register. For example: 464 * @code 465 * HWIO_VAL(REG, FLD, ON) -> 0x1 466 * @endcode 467 * HWIO_FVAL: This macro takes a numerical value and will shift and mask it into 468 * the given field position. For example: 469 * @code 470 * HWIO_FVAL(REG, FLD, 0x1) -> 0x100 471 * @endcode 472 * HWIO_FVALV: This macro takes a logical (named) value and will shift and mask it 473 * into the given field position. For example: 474 * @code 475 * HWIO_FVALV(REG, FLD, ON) -> 0x100 476 * @endcode 477 * 478 * @{ 479 */ 480 #define HWIO_RMSK(hwiosym) __msmhwio_rmsk(hwiosym) 481 #define HWIO_RMSKI(hwiosym, index) __msmhwio_rmski(hwiosym, index) 482 #define HWIO_RSHFT(hwiosym) __msmhwio_rshft(hwiosym) 483 #define HWIO_SHFT(hwio_regsym, hwio_fldsym) __msmhwio_shft(hwio_regsym, hwio_fldsym) 484 #define HWIO_FMSK(hwio_regsym, hwio_fldsym) __msmhwio_fmsk(hwio_regsym, hwio_fldsym) 485 #define HWIO_VAL(io, field, val) __msmhwio_val(io, field, val) 486 #define HWIO_FVAL(io, field, val) (((uint32)(val) << HWIO_SHFT(io, field)) & HWIO_FMSK(io, field)) 487 #define HWIO_FVALV(io, field, val) (((uint32)(HWIO_VAL(io, field, val)) << HWIO_SHFT(io, field)) & HWIO_FMSK(io, field)) 488 /** @} */ 489 490 491 /** 492 * @name Shadow Register Macros 493 * 494 * These macros are used for directly reading the value stored in a 495 * shadow register. 496 * Shadow registers are defined for write-only registers. Generally these 497 * macros should not be necessary as HWIO_OUTM* macros will automatically use 498 * the shadow values internally. 499 * 500 * @{ 501 */ 502 #define HWIO_SHDW(hwiosym) __msmhwio_shdw(hwiosym) 503 #define HWIO_SHDWI(hwiosym, index) __msmhwio_shdwi(hwiosym, index) 504 /** @} */ 505 506 507 508 /** 509 @} 510 */ /* end_group */ 511 512 513 514 515 516 517 518 #define __msmhwio_in(hwiosym) HWIO_##hwiosym##_IN 519 #define __msmhwio_ini(hwiosym, index) HWIO_##hwiosym##_INI(index) 520 #define __msmhwio_ini2(hwiosym, index1, index2) HWIO_##hwiosym##_INI2(index1, index2) 521 #define __msmhwio_ini3(hwiosym, index1, index2, index3) HWIO_##hwiosym##_INI3(index1, index2, index3) 522 #define __msmhwio_inm(hwiosym, mask) HWIO_##hwiosym##_INM(mask) 523 #define __msmhwio_inmi(hwiosym, index, mask) HWIO_##hwiosym##_INMI(index, mask) 524 #define __msmhwio_inmi2(hwiosym, index1, index2, mask) HWIO_##hwiosym##_INMI2(index1, index2, mask) 525 #define __msmhwio_inmi3(hwiosym, index1, index2, index3, mask) HWIO_##hwiosym##_INMI3(index1, index2, index3, mask) 526 #define __msmhwio_out(hwiosym, val) HWIO_##hwiosym##_OUT(val) 527 #define __msmhwio_outi(hwiosym, index, val) HWIO_##hwiosym##_OUTI(index,val) 528 #define __msmhwio_outi2(hwiosym, index1, index2, val) HWIO_##hwiosym##_OUTI2(index1, index2, val) 529 #define __msmhwio_outi3(hwiosym, index1, index2, index3, val) HWIO_##hwiosym##_OUTI2(index1, index2, index3, val) 530 #define __msmhwio_outm(hwiosym, mask, val) HWIO_##hwiosym##_OUTM(mask, val) 531 #define __msmhwio_outmi(hwiosym, index, mask, val) HWIO_##hwiosym##_OUTMI(index, mask, val) 532 #define __msmhwio_outmi2(hwiosym, idx1, idx2, mask, val) HWIO_##hwiosym##_OUTMI2(idx1, idx2, mask, val) 533 #define __msmhwio_outmi3(hwiosym, idx1, idx2, idx3, mask, val) HWIO_##hwiosym##_OUTMI3(idx1, idx2, idx3, mask, val) 534 535 #define __msmhwio_addr(hwiosym) HWIO_##hwiosym##_ADDR 536 #define __msmhwio_addri(hwiosym, index) HWIO_##hwiosym##_ADDR(index) 537 #define __msmhwio_addri2(hwiosym, idx1, idx2) HWIO_##hwiosym##_ADDR(idx1, idx2) 538 #define __msmhwio_addri3(hwiosym, idx1, idx2, idx3) HWIO_##hwiosym##_ADDR(idx1, idx2, idx3) 539 #define __msmhwio_phys(hwiosym) HWIO_##hwiosym##_PHYS 540 #define __msmhwio_physi(hwiosym, index) HWIO_##hwiosym##_PHYS(index) 541 #define __msmhwio_physi2(hwiosym, idx1, idx2) HWIO_##hwiosym##_PHYS(idx1, idx2) 542 #define __msmhwio_physi3(hwiosym, idx1, idx2, idx3) HWIO_##hwiosym##_PHYS(idx1, idx2, idx3) 543 #define __msmhwio_offs(hwiosym) HWIO_##hwiosym##_OFFS 544 #define __msmhwio_offsi(hwiosym, index) HWIO_##hwiosym##_OFFS(index) 545 #define __msmhwio_offsi2(hwiosym, idx1, idx2) HWIO_##hwiosym##_OFFS(idx1, idx2) 546 #define __msmhwio_offsi3(hwiosym, idx1, idx2, idx3) HWIO_##hwiosym##_OFFS(idx1, idx2, idx3) 547 #define __msmhwio_rmsk(hwiosym) HWIO_##hwiosym##_RMSK 548 #define __msmhwio_rmski(hwiosym, index) HWIO_##hwiosym##_RMSK(index) 549 #define __msmhwio_fmsk(hwiosym, hwiofldsym) HWIO_##hwiosym##_##hwiofldsym##_BMSK 550 #define __msmhwio_rshft(hwiosym) HWIO_##hwiosym##_SHFT 551 #define __msmhwio_shft(hwiosym, hwiofldsym) HWIO_##hwiosym##_##hwiofldsym##_SHFT 552 #define __msmhwio_shdw(hwiosym) HWIO_##hwiosym##_shadow 553 #define __msmhwio_shdwi(hwiosym, index) HWIO_##hwiosym##_SHDW(index) 554 #define __msmhwio_val(hwiosym, hwiofld, hwioval) HWIO_##hwiosym##_##hwiofld##_##hwioval##_FVAL 555 556 #define __msmhwio_inx(base, hwiosym) HWIO_##hwiosym##_IN(base) 557 #define __msmhwio_inxi(base, hwiosym, index) HWIO_##hwiosym##_INI(base, index) 558 #define __msmhwio_inxi2(base, hwiosym, index1, index2) HWIO_##hwiosym##_INI2(base, index1, index2) 559 #define __msmhwio_inxi3(base, hwiosym, index1, index2, index3) HWIO_##hwiosym##_INI3(base, index1, index2, index3) 560 #define __msmhwio_inxm(base, hwiosym, mask) HWIO_##hwiosym##_INM(base, mask) 561 #define __msmhwio_inxmi(base, hwiosym, index, mask) HWIO_##hwiosym##_INMI(base, index, mask) 562 #define __msmhwio_inxmi2(base, hwiosym, index1, index2, mask) HWIO_##hwiosym##_INMI2(base, index1, index2, mask) 563 #define __msmhwio_inxmi3(base, hwiosym, index1, index2, index3, mask) HWIO_##hwiosym##_INMI3(base, index1, index2, index3, mask) 564 #define __msmhwio_outx(base, hwiosym, val) HWIO_##hwiosym##_OUT(base, val) 565 #define __msmhwio_outxi(base, hwiosym, index, val) HWIO_##hwiosym##_OUTI(base, index,val) 566 #define __msmhwio_outxi2(base, hwiosym, index1, index2, val) HWIO_##hwiosym##_OUTI2(base, index1, index2, val) 567 #define __msmhwio_outxi3(base, hwiosym, index1, index2, index3, val) HWIO_##hwiosym##_OUTI3(base, index1, index2, index3, val) 568 #define __msmhwio_outxm(base, hwiosym, mask, val) HWIO_##hwiosym##_OUTM(base, mask, val) 569 #define __msmhwio_outxm2(base, hwiosym, mask1, mask2, val1, val2) { \ 570 HWIO_##hwiosym##_OUTM(base, mask1, val1); \ 571 HWIO_##hwiosym##_OUTM(base, mask2, val2); \ 572 } 573 #define __msmhwio_outxm3(base, hwiosym, mask1, mask2, mask3, val1, val2, val3) { \ 574 HWIO_##hwiosym##_OUTM(base, mask1, val1); \ 575 HWIO_##hwiosym##_OUTM(base, mask2, val2); \ 576 HWIO_##hwiosym##_OUTM(base, mask3, val3); \ 577 } 578 #define __msmhwio_outxm4(base, hwiosym, mask1, mask2, mask3, mask4, val1, val2, val3, val4) { \ 579 HWIO_##hwiosym##_OUTM(base, mask1, val1); \ 580 HWIO_##hwiosym##_OUTM(base, mask2, val2); \ 581 HWIO_##hwiosym##_OUTM(base, mask3, val3); \ 582 HWIO_##hwiosym##_OUTM(base, mask4, val4); \ 583 } 584 #define __msmhwio_outxmi(base, hwiosym, index, mask, val) HWIO_##hwiosym##_OUTMI(base, index, mask, val) 585 #define __msmhwio_outxmi2(base, hwiosym, idx1, idx2, mask, val) HWIO_##hwiosym##_OUTMI2(base, idx1, idx2, mask, val) 586 #define __msmhwio_outxmi3(base, hwiosym, idx1, idx2, idx3, mask, val) HWIO_##hwiosym##_OUTMI3(base, idx1, idx2, idx3, mask, val) 587 #define __msmhwio_addrx(base, hwiosym) HWIO_##hwiosym##_ADDR(base) 588 #define __msmhwio_addrxi(base, hwiosym, index) HWIO_##hwiosym##_ADDR(base, index) 589 #define __msmhwio_addrxi2(base, hwiosym, idx1, idx2) HWIO_##hwiosym##_ADDR(base, idx1, idx2) 590 #define __msmhwio_addrxi3(base, hwiosym, idx1, idx2, idx3) HWIO_##hwiosym##_ADDR(base, idx1, idx2, idx3) 591 #define __msmhwio_physx(base, hwiosym) HWIO_##hwiosym##_PHYS(base) 592 #define __msmhwio_physxi(base, hwiosym, index) HWIO_##hwiosym##_PHYS(base, index) 593 #define __msmhwio_physxi2(base, hwiosym, idx1, idx2) HWIO_##hwiosym##_PHYS(base, idx1, idx2) 594 #define __msmhwio_physxi3(base, hwiosym, idx1, idx2, idx3) HWIO_##hwiosym##_PHYS(base, idx1, idx2, idx3) 595 596 597 598 599 600 /* 601 * MSM_x (depreciated) 602 * 603 * These macros should be replaced with the relevant HWIO equivalent. 604 */ 605 #define MSM_OUT(io, val) HWIO_OUT(io, val) 606 #define MSM_IN(io) HWIO_IN(io) 607 #define MSM_OUTM(io, mask, val) HWIO_OUTM(io, mask, val) 608 #define MSM_INM(io, mask) HWIO_INM(io, mask) 609 #define MSM_INF(io, field) HWIO_INF(io, field) 610 #define MSM_FIELD(field, val) (((val) << field##_SHFT) & (field##_BMSK)) 611 #define MSM_OUTSH(io, mask, val) HWIO_OUTM(io, mask, val) 612 #define MSM_FOUTSH(io, field, val) HWIO_OUTM(io, mask, val) 613 #define MSM_SET(io, field) HWIO_OUTM(io, HWIO_FMSK(io, field), HWIO_FMSK(io, field)) 614 #define MSM_SET_BIT(io, bit) HWIO_OUTM(io, (1<<bit), (1<<bit)) 615 #define MSM_SET_i(io, field, index) HWIO_OUTMI(io, index, HWIO_FMSK(io,field), HWIO_FMSK(io,field)) 616 #define MSM_SET_ij(io, field, index1, index2) HWIO_OUTMI2(io, index1, index2, HWIO_FMSK(io,field), HWIO_FMSK(io,field)) 617 #define MSM_CLEAR(io, field) HWIO_OUTM(io, HWIO_FMSK(io, field), 0) 618 #define MSM_CLEAR_BIT(io, bit) HWIO_OUTM(io, (1<<bit), 0) 619 #define MSM_CLEAR_i(io, field, n) HWIO_OUTMI(io, n, HWIO_FMSK(io,field), 0) 620 #define MSM_CLEAR_ij(io, field, m, n) HWIO_OUTMI2(io, m, n, HWIO_FMSK(io,field), 0) 621 #define MSM_SET_MASK(io, mask) HWIO_OUTM(io, mask, mask) 622 #define MSM_CLEAR_MASK(io, mask) HWIO_OUTM(io, mask, 0) 623 #define MSM_PULSE(io, field) HWIO_OUTF(io, field, 1); HWIO_OUTF(io, field, 0) 624 #define MSM_GET(io, field) HWIO_INF(io, field) 625 #define MSM_W(io, val) HWIO_OUT(io, val) 626 #define MSM_W_i(io, val, index) HWIO_OUTI(io, index, val) 627 #define MSM_W_ij(io, val, index1, index2) HWIO_OUTI2(io, index1, index2, val ) 628 #define MSM_W_MASKED(io, field, val) HWIO_OUTF(io, field, val) 629 #define MSM_W_MASKED_i(io, field, val, index) HWIO_OUTFI(io, index, field, val) 630 #define MSM_W_MASKED_ij(io, field, val, index1, index2) HWIO_OUTFI2(io, index1, index2, field, val) 631 #define MSM_R(io) HWIO_IN(io) 632 #define MSM_R_MASKED(base, field) HWIO_INF(base, field) 633 #define MSM_R_MASKED_i(base, field, n) HWIO_INFI(base, n, field) 634 #define MSM_R_MASKED_ij(base, field, index1, index2) HWIO_INFI2(base, index1, index2, field) 635 #define MSM_GET_BIT(io, bit) (HWIO_INM(io, (1<<bit) ) >> bit) 636 #define MSM_NOT_USED( i ) if(i) {} 637 638 639 /* 640 * MSM_LOCK / MSM_UNLOCK (depreciated) 641 * 642 * These macros are intended to be used if a client will be issuing a 643 * series of HWIO writes to avoid the multiple locking/freeing of interrupts 644 * that will otherwise occur. 645 * They should be replaced with HWIO_LOCK / HWIO_UNLOCK 646 */ 647 #define MSM_LOCK_REQUIRED \ 648 /*lint -save -e548 else expected*/ \ 649 MSM_LOCK_required = MSM_LOCK_required; \ 650 /*lint -restore */ 651 652 #define MSM_LOCK( ) \ 653 { \ 654 boolean MSM_LOCK_required = TRUE; \ 655 uint32 msm_sav; \ 656 INTLOCK_SAV(msm_sav) 657 658 #define MSM_UNLOCK( ) \ 659 MSM_LOCK_REQUIRED \ 660 INTFREE_SAV(msm_sav); \ 661 } 662 663 #define MSM_UNLOCK_AND_LOCK( ) \ 664 MSM_LOCK_REQUIRED \ 665 INTFREE_SAV( msm_sav ), \ 666 INTLOCK_SAV( msm_sav ) 667 668 669 /* 670 * INPxx / OUTPxx (depreciated) 671 * 672 */ 673 #define INP32(addr) in_dword(addr) 674 #define INP32M(addr, mask) in_dword_masked(addr,mask) 675 #define OUTP32(addr, val) out_dword(addr, val) 676 #define OUTP32M(addr, mask, val) \ 677 HWIO_INTLOCK(); \ 678 out_dword_masked_ns(addr, mask, val, INP32(addr)); \ 679 HWIO_INTFREE() 680 681 682 /* 683 * HWIO_LOCK / HWIO_UNLOCK 684 * 685 * These macros are intended to be used if a client will be issuing a 686 * series of HWIO writes to avoid the multiple locking/freeing of interrupts 687 * that will otherwise occur. 688 */ 689 #define HWIO_LOCK() \ 690 { \ 691 uint16 hwio_sav; \ 692 INTLOCK_SAV(hwio_sav) 693 694 #define HWIO_UNLOCK() \ 695 INTFREE_SAV(hwio_sav); \ 696 } 697 698 699 #if defined(FEATURE_WINCE_BOOTLOADER) 700 701 #define HWIO_INTLOCK() 702 703 #define HWIO_INTFREE() 704 705 #elif defined(FEATURE_WINCE_OAL) 706 707 #define HWIO_INTLOCK() \ 708 { \ 709 uint32 ints_already_enabled = INTERRUPTS_ENABLE(FALSE) 710 711 #define HWIO_INTFREE() \ 712 if (ints_already_enabled) INTERRUPTS_ENABLE(TRUE); \ 713 } 714 715 #else 716 717 #define HWIO_INTLOCK() \ 718 { \ 719 uint32 intlock_sav; \ 720 INTLOCK_SAV(intlock_sav) 721 722 #define HWIO_INTFREE() \ 723 INTFREE_SAV(intlock_sav); \ 724 } 725 726 #endif 727 728 #if defined (PTI_PRINTF_EN) || defined(PTI_MEMORY_EN) || defined(PTI_STM_EN) 729 730 #define __inp(port) (*((volatile uint8 *) (port))) 731 #define __inpw(port) (*((volatile uint16 *) (port))) 732 // #define __inpdw(port) (*((volatile uint32 *) (port))) 733 #define __inpdw(port) pti_inpdw((uint32 *) (port)) 734 735 #define __outp(port, val) (*((volatile uint8 *) (port)) = ((uint8) (val))) 736 #define __outpw(port, val) (*((volatile uint16 *) (port)) = ((uint16) (val))) 737 // #define __outpdw(port, val) (*((volatile uint32 *) (port)) = ((uint32) (val))) 738 #define __outpdw(port, val) pti_outpdw((uint32 *) (port), (val)) 739 #elif defined(__FWV) || defined(__KERNEL__) || defined(__SHARED_CODE) || defined(QURT_UFW_BUILD) || defined (_WIN) 740 extern uint32_t registerRead(unsigned long addr); 741 extern void registerWrite(unsigned long addr, uint32_t value); 742 #define __inp(port) registerRead(port) 743 #define __inpw(port) registerRead(port) 744 #define __inpdw(port) registerRead(port) 745 #define __outp(port, val) registerWrite(port, val) 746 #define __outpw(port, val) registerWrite(port, val) 747 #define __outpdw(port, val) registerWrite(port, val) 748 #else 749 #ifdef CDVI_SVTB_VERBOSE 750 #define __inp(port) ((printf("CDVI_SVTB_VERBOSE: Calling bus_read from %s:%0d\n", __FILE__,__LINE__)&0) + bus_read(port)) 751 #else 752 #define __inp(port) bus_read(port) 753 #endif 754 #define __inpw(port) __inp(port) 755 #define __inpdw(port) __inp(port) 756 757 #ifdef CDVI_SVTB_VERBOSE 758 #define __outp(port, val) ((printf("CDVI_SVTB_VERBOSE: Calling bus_write from %s:%0d\n",__FILE__,__LINE__)&0) + bus_write (port, val)) 759 #else 760 #define __outp(port, val) bus_write (port, val) 761 #endif 762 #define __outpw(port, val) __outp (port, val) 763 #define __outpdw(port, val) __outp (port, val) 764 #endif 765 766 767 #define in_byte(addr) (__inp(addr)) 768 #define in_byte_masked(addr, mask) (__inp(addr) & (mask)) 769 #define out_byte(addr, val) __outp(addr,val) 770 #define out_byte_masked(io, mask, val, shadow) \ 771 HWIO_INTLOCK(); \ 772 (void) out_byte( io, shadow); \ 773 shadow = (shadow & (uint16)(~(mask))) | ((uint16)((val) & (mask))); \ 774 HWIO_INTFREE() 775 #define out_byte_masked_ns(io, mask, val, current_reg_content) \ 776 (void) out_byte( io, ((current_reg_content & (uint16)(~(mask))) | \ 777 ((uint16)((val) & (mask)))) ) 778 779 #define in_word(addr) (__inpw(addr)) 780 #define in_word_masked(addr, mask) (__inpw(addr) & (mask)) 781 #define out_word(addr, val) __outpw(addr,val) 782 #define out_word_masked(io, mask, val, shadow) \ 783 HWIO_INTLOCK( ); \ 784 shadow = (shadow & (uint16)(~(mask))) | ((uint16)((val) & (mask))); \ 785 (void) out_word( io, shadow); \ 786 HWIO_INTFREE( ) 787 #define out_word_masked_ns(io, mask, val, current_reg_content) \ 788 (void) out_word( io, ((current_reg_content & (uint16)(~(mask))) | \ 789 ((uint16)((val) & (mask)))) ) 790 791 #define in_dword(addr) (__inpdw(addr)) 792 #define in_dword_masked(addr, mask) (__inpdw(addr) & (mask)) 793 #define out_dword(addr, val) __outpdw(addr,val) 794 #define out_dword_masked(io, mask, val, shadow) \ 795 HWIO_INTLOCK( ); \ 796 shadow = (shadow & (uint32)(~(mask))) | ((uint32)((val) & (mask))); \ 797 (void) out_dword( io, shadow); \ 798 HWIO_INTFREE( ) 799 #define out_dword_masked_ns(io, mask, val, current_reg_content) \ 800 (void) out_dword( io, ((current_reg_content & (uint32)(~(mask))) | ((uint32)((val) & (mask)))) ) 801 802 /* 803 * Base 64-bit quad-word accessing macros. 804 */ 805 #define in_qword(addr) (__inpqw(addr)) 806 #define in_qword_masked(addr, mask) (__inpqw(addr) & (mask)) 807 #define out_qword(addr, val) __outpqw(addr,val) 808 #define out_qword_masked(io, mask, val, shadow) \ 809 HWIO_INTLOCK(); \ 810 shadow = (shadow & (uint64)(~(mask))) | ((uint64)((val) & (mask))); \ 811 out_qword( io, shadow); \ 812 HWIO_INTFREE() 813 #define out_qword_masked_ns(io, mask, val, current_reg_content) \ 814 out_qword( io, ((current_reg_content & (uint64)(~(mask))) | \ 815 ((uint64)((val) & (mask)))) ) 816 817 #define OUTP64(addr, val) out_qword(addr, val) 818 #define __outpqw(port, val) (*((volatile uint64 *) (port)) = ((uint64) (val))) 819 820 #define INP64(addr) in_qword(addr) 821 #define __inpqw(port) (*((volatile uint64 *) (port))) 822 823 #endif 824 825 826