xref: /wlan-driver/fw-api/fw/cepci.h (revision 5113495b16420b49004c444715d2daae2066e7dc) !
1 /*
2  * Copyright (c) 2012-2016 The Linux Foundation. All rights reserved.
3  *
4  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5  *
6  *
7  * Permission to use, copy, modify, and/or distribute this software for
8  * any purpose with or without fee is hereby granted, provided that the
9  * above copyright notice and this permission notice appear in all
10  * copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19  * PERFORMANCE OF THIS SOFTWARE.
20  */
21 
22 /*
23  * This file was originally distributed by Qualcomm Atheros, Inc.
24  * under proprietary terms before Copyright ownership was assigned
25  * to the Linux Foundation.
26  */
27 
28 #ifndef __CEPCI_H__
29 #define __CEPCI_H__
30 
31 /*
32  * Support for Copy Engine over PCI.
33  * Structures shared between Host software and Target firmware.
34  */
35 #include <a_types.h> /* A_UINT32 */
36 
37 /*
38  * Total number of PCIe MSI interrupts requested for all interrupt sources.
39  * PCIe standard forces this to be a power of 2.
40  * Some Host OS's limit MSI requests that can be granted to 8
41  * so for now we abide by this limit and avoid requesting more
42  * than that.
43  */
44 #define MSI_NUM_REQUEST_LOG2  3
45 #define MSI_NUM_REQUEST       (1<<MSI_NUM_REQUEST_LOG2)
46 
47 /*
48  * Granted MSIs are assigned as follows:
49  *  Firmware uses the first
50  *  Remaining MSIs, if any, are used by Copy Engines
51  * This mapping is known to both Target firmware and Host software.
52  * It may be changed as long as Host and Target are kept in sync.
53  */
54 #define MSI_ASSIGN_FW         0 /* 1 MSI for firmware (errors, etc.) */
55 #define MSI_ASSIGN_CE_INITIAL 1 /* 7 MSIs for Copy Engines */
56 #define MSI_ASSIGN_CE_MAX     7
57 
58 
59 
60 
61 /*
62  * PCI-specific Target state.  Much of this may be of interest
63  * to the Host so HOST_INTEREST->hi_interconnect_state points
64  * here (and all members are 32-bit quantities in order to
65  * facilitate Host access). In particular, Host software is
66  * required to initialize pipe_cfg_addr and svc_to_pipe_map.
67  */
68 struct pcie_state_s {
69     A_UINT32 pipe_cfg_addr;      /* Pipe configuration Target address */
70                                  /* NB: CE_pipe_config[CE_COUNT] */
71 
72     A_UINT32 svc_to_pipe_map;    /* Service to pipe map Target address */
73                                  /* NB: service_to_pipe[PIPE_TO_CE_MAP_CN] */
74 
75     A_UINT32 MSI_requested;      /* number of MSI interrupts requested */
76     A_UINT32 MSI_granted;        /* number of MSI interrupts granted */
77     A_UINT32 MSI_addr;           /* Message Signalled Interrupt address */
78     A_UINT32 MSI_data;           /* Base data */
79     A_UINT32 MSI_fw_intr_data;   /* Data for firmware interrupt;
80                                     MSI data for other interrupts are
81                                     in various SoC registers */
82 
83     A_UINT32 power_mgmt_method;  /* PCIE_PWR_METHOD_* */
84     A_UINT32 config_flags;       /* PCIE_CONFIG_FLAG_* */
85 };
86 
87 /*
88  * PCIE_CONFIG_FLAG definitions
89  */
90 
91 #define PCIE_CONFIG_FLAG_ENABLE_L1  0x0000001
92 #define CE_PKTLOG_PIPE   8      /* used by both host and target side */
93 
94 #define PCIE_CONFIG_FLAG_CLK_GATING_L1      0x0000001
95 #define PCIE_CONFIG_FLAG_CLK_SWITCH_WAIT    0x0000002
96 #define PCIE_CONFIG_FLAG_AXI_CLK_GATE       0x0000004
97 #define PCIE_CONFIG_FLAG_CLK_REQ_L1         0x0000008
98 
99 #define PIPE_TO_CE_MAP_CNT 32 /* simple implementation constant */
100 
101 /*
102  * Configuration information for a Copy Engine pipe.
103  * Passed from Host to Target during startup (one per CE).
104  */
105 struct CE_pipe_config {
106     A_UINT32 pipenum;
107     A_UINT32 pipedir;
108     A_UINT32 nentries;
109     A_UINT32 nbytes_max;
110     A_UINT32 flags;
111     A_UINT32 reserved;
112 };
113 
114 #endif /* __CEPCI_H__ */
115