Searched refs:Q6_ENABLE_REGISTER_0 (Results 1 – 4 of 4) sorted by relevance
433 #define Q6_ENABLE_REGISTER_0 \ macro
430 #define Q6_ENABLE_REGISTER_0 \ macro
548 #define Q6_ENABLE_REGISTER_0 \ macro
229 target_enable0 = hif_read32_mb(sc, sc->mem + Q6_ENABLE_REGISTER_0); in hif_pci_route_adrastea_interrupt()236 hif_write32_mb(sc, sc->mem + Q6_ENABLE_REGISTER_0, 0); in hif_pci_route_adrastea_interrupt()