1 2 /* 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 23 24 25 26 27 28 29 30 #ifndef _RX_MSDU_END_H_ 31 #define _RX_MSDU_END_H_ 32 #if !defined(__ASSEMBLER__) 33 #endif 34 35 #define NUM_OF_DWORDS_RX_MSDU_END 32 36 37 #define NUM_OF_QWORDS_RX_MSDU_END 16 38 39 40 struct rx_msdu_end { 41 uint32_t rxpcu_mpdu_filter_in_category : 2, 42 sw_frame_group_id : 7, 43 reserved_0 : 7, 44 phy_ppdu_id : 16; 45 uint32_t ip_hdr_chksum : 16, 46 reported_mpdu_length : 14, 47 reserved_1a : 2; 48 uint32_t key_id_octet : 8, 49 cce_super_rule : 6, 50 cce_classify_not_done_truncate : 1, 51 cce_classify_not_done_cce_dis : 1, 52 cumulative_l3_checksum : 16; 53 uint32_t rule_indication_31_0 : 32; 54 uint32_t rule_indication_63_32 : 32; 55 uint32_t da_offset : 6, 56 sa_offset : 6, 57 da_offset_valid : 1, 58 sa_offset_valid : 1, 59 reserved_5a : 2, 60 l3_type : 16; 61 uint32_t ipv6_options_crc : 32; 62 uint32_t tcp_seq_number : 32; 63 uint32_t tcp_ack_number : 32; 64 uint32_t tcp_flag : 9, 65 lro_eligible : 1, 66 reserved_9a : 6, 67 window_size : 16; 68 uint32_t tcp_udp_chksum : 16, 69 sa_idx_timeout : 1, 70 da_idx_timeout : 1, 71 msdu_limit_error : 1, 72 flow_idx_timeout : 1, 73 flow_idx_invalid : 1, 74 wifi_parser_error : 1, 75 amsdu_parser_error : 1, 76 sa_is_valid : 1, 77 da_is_valid : 1, 78 da_is_mcbc : 1, 79 l3_header_padding : 2, 80 first_msdu : 1, 81 last_msdu : 1, 82 tcp_udp_chksum_fail_copy : 1, 83 ip_chksum_fail_copy : 1; 84 uint32_t sa_idx : 16, 85 da_idx_or_sw_peer_id : 16; 86 uint32_t msdu_drop : 1, 87 reo_destination_indication : 5, 88 flow_idx : 20, 89 use_ppe : 1, 90 reserved_12a : 5; 91 uint32_t fse_metadata : 32; 92 uint32_t cce_metadata : 16, 93 sa_sw_peer_id : 16; 94 uint32_t aggregation_count : 8, 95 flow_aggregation_continuation : 1, 96 fisa_timeout : 1, 97 reserved_15a : 22; 98 uint32_t cumulative_l4_checksum : 16, 99 cumulative_ip_length : 16; 100 uint32_t reserved_17a : 6, 101 service_code : 9, 102 priority_valid : 1, 103 intra_bss : 1, 104 dest_chip_id : 2, 105 multicast_echo : 1, 106 wds_learning_event : 1, 107 wds_roaming_event : 1, 108 wds_keep_alive_event : 1, 109 reserved_17b : 9; 110 uint32_t msdu_length : 14, 111 stbc : 1, 112 ipsec_esp : 1, 113 l3_offset : 7, 114 ipsec_ah : 1, 115 l4_offset : 8; 116 uint32_t msdu_number : 8, 117 decap_format : 2, 118 ipv4_proto : 1, 119 ipv6_proto : 1, 120 tcp_proto : 1, 121 udp_proto : 1, 122 ip_frag : 1, 123 tcp_only_ack : 1, 124 da_is_bcast_mcast : 1, 125 toeplitz_hash_sel : 2, 126 ip_fixed_header_valid : 1, 127 ip_extn_header_valid : 1, 128 tcp_udp_header_valid : 1, 129 mesh_control_present : 1, 130 ldpc : 1, 131 ip4_protocol_ip6_next_header : 8; 132 uint32_t toeplitz_hash_2_or_4 : 32; 133 uint32_t flow_id_toeplitz : 32; 134 uint32_t user_rssi : 8, 135 pkt_type : 4, 136 sgi : 2, 137 rate_mcs : 4, 138 receive_bandwidth : 3, 139 reception_type : 3, 140 mimo_ss_bitmap : 8; 141 uint32_t ppdu_start_timestamp_31_0 : 32; 142 uint32_t ppdu_start_timestamp_63_32 : 32; 143 uint32_t sw_phy_meta_data : 32; 144 uint32_t vlan_ctag_ci : 16, 145 vlan_stag_ci : 16; 146 uint32_t reserved_27a : 32; 147 uint32_t reserved_28a : 32; 148 uint32_t reserved_29a : 32; 149 uint32_t first_mpdu : 1, 150 reserved_30a : 1, 151 mcast_bcast : 1, 152 ast_index_not_found : 1, 153 ast_index_timeout : 1, 154 power_mgmt : 1, 155 non_qos : 1, 156 null_data : 1, 157 mgmt_type : 1, 158 ctrl_type : 1, 159 more_data : 1, 160 eosp : 1, 161 a_msdu_error : 1, 162 fragment_flag : 1, 163 order : 1, 164 cce_match : 1, 165 overflow_err : 1, 166 msdu_length_err : 1, 167 tcp_udp_chksum_fail : 1, 168 ip_chksum_fail : 1, 169 sa_idx_invalid : 1, 170 da_idx_invalid : 1, 171 reserved_30b : 1, 172 rx_in_tx_decrypt_byp : 1, 173 encrypt_required : 1, 174 directed : 1, 175 buffer_fragment : 1, 176 mpdu_length_err : 1, 177 tkip_mic_err : 1, 178 decrypt_err : 1, 179 unencrypted_frame_err : 1, 180 fcs_err : 1; 181 uint32_t reserved_31a : 10, 182 decrypt_status_code : 3, 183 rx_bitmap_not_updated : 1, 184 reserved_31b : 17, 185 msdu_done : 1; 186 }; 187 188 189 190 191 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x0000000000000000 192 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 193 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1 194 #define RX_MSDU_END_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x0000000000000003 195 196 197 198 199 #define RX_MSDU_END_SW_FRAME_GROUP_ID_OFFSET 0x0000000000000000 200 #define RX_MSDU_END_SW_FRAME_GROUP_ID_LSB 2 201 #define RX_MSDU_END_SW_FRAME_GROUP_ID_MSB 8 202 #define RX_MSDU_END_SW_FRAME_GROUP_ID_MASK 0x00000000000001fc 203 204 205 206 207 #define RX_MSDU_END_RESERVED_0_OFFSET 0x0000000000000000 208 #define RX_MSDU_END_RESERVED_0_LSB 9 209 #define RX_MSDU_END_RESERVED_0_MSB 15 210 #define RX_MSDU_END_RESERVED_0_MASK 0x000000000000fe00 211 212 213 214 215 #define RX_MSDU_END_PHY_PPDU_ID_OFFSET 0x0000000000000000 216 #define RX_MSDU_END_PHY_PPDU_ID_LSB 16 217 #define RX_MSDU_END_PHY_PPDU_ID_MSB 31 218 #define RX_MSDU_END_PHY_PPDU_ID_MASK 0x00000000ffff0000 219 220 221 222 223 #define RX_MSDU_END_IP_HDR_CHKSUM_OFFSET 0x0000000000000000 224 #define RX_MSDU_END_IP_HDR_CHKSUM_LSB 32 225 #define RX_MSDU_END_IP_HDR_CHKSUM_MSB 47 226 #define RX_MSDU_END_IP_HDR_CHKSUM_MASK 0x0000ffff00000000 227 228 229 230 231 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_OFFSET 0x0000000000000000 232 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_LSB 48 233 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_MSB 61 234 #define RX_MSDU_END_REPORTED_MPDU_LENGTH_MASK 0x3fff000000000000 235 236 237 238 239 #define RX_MSDU_END_RESERVED_1A_OFFSET 0x0000000000000000 240 #define RX_MSDU_END_RESERVED_1A_LSB 62 241 #define RX_MSDU_END_RESERVED_1A_MSB 63 242 #define RX_MSDU_END_RESERVED_1A_MASK 0xc000000000000000 243 244 245 246 247 #define RX_MSDU_END_KEY_ID_OCTET_OFFSET 0x0000000000000008 248 #define RX_MSDU_END_KEY_ID_OCTET_LSB 0 249 #define RX_MSDU_END_KEY_ID_OCTET_MSB 7 250 #define RX_MSDU_END_KEY_ID_OCTET_MASK 0x00000000000000ff 251 252 253 254 255 #define RX_MSDU_END_CCE_SUPER_RULE_OFFSET 0x0000000000000008 256 #define RX_MSDU_END_CCE_SUPER_RULE_LSB 8 257 #define RX_MSDU_END_CCE_SUPER_RULE_MSB 13 258 #define RX_MSDU_END_CCE_SUPER_RULE_MASK 0x0000000000003f00 259 260 261 262 263 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_OFFSET 0x0000000000000008 264 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_LSB 14 265 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_MSB 14 266 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_TRUNCATE_MASK 0x0000000000004000 267 268 269 270 271 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_OFFSET 0x0000000000000008 272 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_LSB 15 273 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_MSB 15 274 #define RX_MSDU_END_CCE_CLASSIFY_NOT_DONE_CCE_DIS_MASK 0x0000000000008000 275 276 277 278 279 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_OFFSET 0x0000000000000008 280 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_LSB 16 281 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_MSB 31 282 #define RX_MSDU_END_CUMULATIVE_L3_CHECKSUM_MASK 0x00000000ffff0000 283 284 285 286 287 #define RX_MSDU_END_RULE_INDICATION_31_0_OFFSET 0x0000000000000008 288 #define RX_MSDU_END_RULE_INDICATION_31_0_LSB 32 289 #define RX_MSDU_END_RULE_INDICATION_31_0_MSB 63 290 #define RX_MSDU_END_RULE_INDICATION_31_0_MASK 0xffffffff00000000 291 292 293 294 295 #define RX_MSDU_END_RULE_INDICATION_63_32_OFFSET 0x0000000000000010 296 #define RX_MSDU_END_RULE_INDICATION_63_32_LSB 0 297 #define RX_MSDU_END_RULE_INDICATION_63_32_MSB 31 298 #define RX_MSDU_END_RULE_INDICATION_63_32_MASK 0x00000000ffffffff 299 300 301 302 303 #define RX_MSDU_END_DA_OFFSET_OFFSET 0x0000000000000010 304 #define RX_MSDU_END_DA_OFFSET_LSB 32 305 #define RX_MSDU_END_DA_OFFSET_MSB 37 306 #define RX_MSDU_END_DA_OFFSET_MASK 0x0000003f00000000 307 308 309 310 311 #define RX_MSDU_END_SA_OFFSET_OFFSET 0x0000000000000010 312 #define RX_MSDU_END_SA_OFFSET_LSB 38 313 #define RX_MSDU_END_SA_OFFSET_MSB 43 314 #define RX_MSDU_END_SA_OFFSET_MASK 0x00000fc000000000 315 316 317 318 319 #define RX_MSDU_END_DA_OFFSET_VALID_OFFSET 0x0000000000000010 320 #define RX_MSDU_END_DA_OFFSET_VALID_LSB 44 321 #define RX_MSDU_END_DA_OFFSET_VALID_MSB 44 322 #define RX_MSDU_END_DA_OFFSET_VALID_MASK 0x0000100000000000 323 324 325 326 327 #define RX_MSDU_END_SA_OFFSET_VALID_OFFSET 0x0000000000000010 328 #define RX_MSDU_END_SA_OFFSET_VALID_LSB 45 329 #define RX_MSDU_END_SA_OFFSET_VALID_MSB 45 330 #define RX_MSDU_END_SA_OFFSET_VALID_MASK 0x0000200000000000 331 332 333 334 335 #define RX_MSDU_END_RESERVED_5A_OFFSET 0x0000000000000010 336 #define RX_MSDU_END_RESERVED_5A_LSB 46 337 #define RX_MSDU_END_RESERVED_5A_MSB 47 338 #define RX_MSDU_END_RESERVED_5A_MASK 0x0000c00000000000 339 340 341 342 343 #define RX_MSDU_END_L3_TYPE_OFFSET 0x0000000000000010 344 #define RX_MSDU_END_L3_TYPE_LSB 48 345 #define RX_MSDU_END_L3_TYPE_MSB 63 346 #define RX_MSDU_END_L3_TYPE_MASK 0xffff000000000000 347 348 349 350 351 #define RX_MSDU_END_IPV6_OPTIONS_CRC_OFFSET 0x0000000000000018 352 #define RX_MSDU_END_IPV6_OPTIONS_CRC_LSB 0 353 #define RX_MSDU_END_IPV6_OPTIONS_CRC_MSB 31 354 #define RX_MSDU_END_IPV6_OPTIONS_CRC_MASK 0x00000000ffffffff 355 356 357 358 359 #define RX_MSDU_END_TCP_SEQ_NUMBER_OFFSET 0x0000000000000018 360 #define RX_MSDU_END_TCP_SEQ_NUMBER_LSB 32 361 #define RX_MSDU_END_TCP_SEQ_NUMBER_MSB 63 362 #define RX_MSDU_END_TCP_SEQ_NUMBER_MASK 0xffffffff00000000 363 364 365 366 367 #define RX_MSDU_END_TCP_ACK_NUMBER_OFFSET 0x0000000000000020 368 #define RX_MSDU_END_TCP_ACK_NUMBER_LSB 0 369 #define RX_MSDU_END_TCP_ACK_NUMBER_MSB 31 370 #define RX_MSDU_END_TCP_ACK_NUMBER_MASK 0x00000000ffffffff 371 372 373 374 375 #define RX_MSDU_END_TCP_FLAG_OFFSET 0x0000000000000020 376 #define RX_MSDU_END_TCP_FLAG_LSB 32 377 #define RX_MSDU_END_TCP_FLAG_MSB 40 378 #define RX_MSDU_END_TCP_FLAG_MASK 0x000001ff00000000 379 380 381 382 383 #define RX_MSDU_END_LRO_ELIGIBLE_OFFSET 0x0000000000000020 384 #define RX_MSDU_END_LRO_ELIGIBLE_LSB 41 385 #define RX_MSDU_END_LRO_ELIGIBLE_MSB 41 386 #define RX_MSDU_END_LRO_ELIGIBLE_MASK 0x0000020000000000 387 388 389 390 391 #define RX_MSDU_END_RESERVED_9A_OFFSET 0x0000000000000020 392 #define RX_MSDU_END_RESERVED_9A_LSB 42 393 #define RX_MSDU_END_RESERVED_9A_MSB 47 394 #define RX_MSDU_END_RESERVED_9A_MASK 0x0000fc0000000000 395 396 397 398 399 #define RX_MSDU_END_WINDOW_SIZE_OFFSET 0x0000000000000020 400 #define RX_MSDU_END_WINDOW_SIZE_LSB 48 401 #define RX_MSDU_END_WINDOW_SIZE_MSB 63 402 #define RX_MSDU_END_WINDOW_SIZE_MASK 0xffff000000000000 403 404 405 406 407 #define RX_MSDU_END_TCP_UDP_CHKSUM_OFFSET 0x0000000000000028 408 #define RX_MSDU_END_TCP_UDP_CHKSUM_LSB 0 409 #define RX_MSDU_END_TCP_UDP_CHKSUM_MSB 15 410 #define RX_MSDU_END_TCP_UDP_CHKSUM_MASK 0x000000000000ffff 411 412 413 414 415 #define RX_MSDU_END_SA_IDX_TIMEOUT_OFFSET 0x0000000000000028 416 #define RX_MSDU_END_SA_IDX_TIMEOUT_LSB 16 417 #define RX_MSDU_END_SA_IDX_TIMEOUT_MSB 16 418 #define RX_MSDU_END_SA_IDX_TIMEOUT_MASK 0x0000000000010000 419 420 421 422 423 #define RX_MSDU_END_DA_IDX_TIMEOUT_OFFSET 0x0000000000000028 424 #define RX_MSDU_END_DA_IDX_TIMEOUT_LSB 17 425 #define RX_MSDU_END_DA_IDX_TIMEOUT_MSB 17 426 #define RX_MSDU_END_DA_IDX_TIMEOUT_MASK 0x0000000000020000 427 428 429 430 431 #define RX_MSDU_END_MSDU_LIMIT_ERROR_OFFSET 0x0000000000000028 432 #define RX_MSDU_END_MSDU_LIMIT_ERROR_LSB 18 433 #define RX_MSDU_END_MSDU_LIMIT_ERROR_MSB 18 434 #define RX_MSDU_END_MSDU_LIMIT_ERROR_MASK 0x0000000000040000 435 436 437 438 439 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_OFFSET 0x0000000000000028 440 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_LSB 19 441 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_MSB 19 442 #define RX_MSDU_END_FLOW_IDX_TIMEOUT_MASK 0x0000000000080000 443 444 445 446 447 #define RX_MSDU_END_FLOW_IDX_INVALID_OFFSET 0x0000000000000028 448 #define RX_MSDU_END_FLOW_IDX_INVALID_LSB 20 449 #define RX_MSDU_END_FLOW_IDX_INVALID_MSB 20 450 #define RX_MSDU_END_FLOW_IDX_INVALID_MASK 0x0000000000100000 451 452 453 454 455 #define RX_MSDU_END_WIFI_PARSER_ERROR_OFFSET 0x0000000000000028 456 #define RX_MSDU_END_WIFI_PARSER_ERROR_LSB 21 457 #define RX_MSDU_END_WIFI_PARSER_ERROR_MSB 21 458 #define RX_MSDU_END_WIFI_PARSER_ERROR_MASK 0x0000000000200000 459 460 461 462 463 #define RX_MSDU_END_AMSDU_PARSER_ERROR_OFFSET 0x0000000000000028 464 #define RX_MSDU_END_AMSDU_PARSER_ERROR_LSB 22 465 #define RX_MSDU_END_AMSDU_PARSER_ERROR_MSB 22 466 #define RX_MSDU_END_AMSDU_PARSER_ERROR_MASK 0x0000000000400000 467 468 469 470 471 #define RX_MSDU_END_SA_IS_VALID_OFFSET 0x0000000000000028 472 #define RX_MSDU_END_SA_IS_VALID_LSB 23 473 #define RX_MSDU_END_SA_IS_VALID_MSB 23 474 #define RX_MSDU_END_SA_IS_VALID_MASK 0x0000000000800000 475 476 477 478 479 #define RX_MSDU_END_DA_IS_VALID_OFFSET 0x0000000000000028 480 #define RX_MSDU_END_DA_IS_VALID_LSB 24 481 #define RX_MSDU_END_DA_IS_VALID_MSB 24 482 #define RX_MSDU_END_DA_IS_VALID_MASK 0x0000000001000000 483 484 485 486 487 #define RX_MSDU_END_DA_IS_MCBC_OFFSET 0x0000000000000028 488 #define RX_MSDU_END_DA_IS_MCBC_LSB 25 489 #define RX_MSDU_END_DA_IS_MCBC_MSB 25 490 #define RX_MSDU_END_DA_IS_MCBC_MASK 0x0000000002000000 491 492 493 494 495 #define RX_MSDU_END_L3_HEADER_PADDING_OFFSET 0x0000000000000028 496 #define RX_MSDU_END_L3_HEADER_PADDING_LSB 26 497 #define RX_MSDU_END_L3_HEADER_PADDING_MSB 27 498 #define RX_MSDU_END_L3_HEADER_PADDING_MASK 0x000000000c000000 499 500 501 502 503 #define RX_MSDU_END_FIRST_MSDU_OFFSET 0x0000000000000028 504 #define RX_MSDU_END_FIRST_MSDU_LSB 28 505 #define RX_MSDU_END_FIRST_MSDU_MSB 28 506 #define RX_MSDU_END_FIRST_MSDU_MASK 0x0000000010000000 507 508 509 510 511 #define RX_MSDU_END_LAST_MSDU_OFFSET 0x0000000000000028 512 #define RX_MSDU_END_LAST_MSDU_LSB 29 513 #define RX_MSDU_END_LAST_MSDU_MSB 29 514 #define RX_MSDU_END_LAST_MSDU_MASK 0x0000000020000000 515 516 517 518 519 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_OFFSET 0x0000000000000028 520 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_LSB 30 521 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_MSB 30 522 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_COPY_MASK 0x0000000040000000 523 524 525 526 527 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_OFFSET 0x0000000000000028 528 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_LSB 31 529 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_MSB 31 530 #define RX_MSDU_END_IP_CHKSUM_FAIL_COPY_MASK 0x0000000080000000 531 532 533 534 535 #define RX_MSDU_END_SA_IDX_OFFSET 0x0000000000000028 536 #define RX_MSDU_END_SA_IDX_LSB 32 537 #define RX_MSDU_END_SA_IDX_MSB 47 538 #define RX_MSDU_END_SA_IDX_MASK 0x0000ffff00000000 539 540 541 542 543 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_OFFSET 0x0000000000000028 544 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_LSB 48 545 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_MSB 63 546 #define RX_MSDU_END_DA_IDX_OR_SW_PEER_ID_MASK 0xffff000000000000 547 548 549 550 551 #define RX_MSDU_END_MSDU_DROP_OFFSET 0x0000000000000030 552 #define RX_MSDU_END_MSDU_DROP_LSB 0 553 #define RX_MSDU_END_MSDU_DROP_MSB 0 554 #define RX_MSDU_END_MSDU_DROP_MASK 0x0000000000000001 555 556 557 558 559 #define RX_MSDU_END_REO_DESTINATION_INDICATION_OFFSET 0x0000000000000030 560 #define RX_MSDU_END_REO_DESTINATION_INDICATION_LSB 1 561 #define RX_MSDU_END_REO_DESTINATION_INDICATION_MSB 5 562 #define RX_MSDU_END_REO_DESTINATION_INDICATION_MASK 0x000000000000003e 563 564 565 566 567 #define RX_MSDU_END_FLOW_IDX_OFFSET 0x0000000000000030 568 #define RX_MSDU_END_FLOW_IDX_LSB 6 569 #define RX_MSDU_END_FLOW_IDX_MSB 25 570 #define RX_MSDU_END_FLOW_IDX_MASK 0x0000000003ffffc0 571 572 573 574 575 #define RX_MSDU_END_USE_PPE_OFFSET 0x0000000000000030 576 #define RX_MSDU_END_USE_PPE_LSB 26 577 #define RX_MSDU_END_USE_PPE_MSB 26 578 #define RX_MSDU_END_USE_PPE_MASK 0x0000000004000000 579 580 581 582 583 #define RX_MSDU_END_RESERVED_12A_OFFSET 0x0000000000000030 584 #define RX_MSDU_END_RESERVED_12A_LSB 27 585 #define RX_MSDU_END_RESERVED_12A_MSB 31 586 #define RX_MSDU_END_RESERVED_12A_MASK 0x00000000f8000000 587 588 589 590 591 #define RX_MSDU_END_FSE_METADATA_OFFSET 0x0000000000000030 592 #define RX_MSDU_END_FSE_METADATA_LSB 32 593 #define RX_MSDU_END_FSE_METADATA_MSB 63 594 #define RX_MSDU_END_FSE_METADATA_MASK 0xffffffff00000000 595 596 597 598 599 #define RX_MSDU_END_CCE_METADATA_OFFSET 0x0000000000000038 600 #define RX_MSDU_END_CCE_METADATA_LSB 0 601 #define RX_MSDU_END_CCE_METADATA_MSB 15 602 #define RX_MSDU_END_CCE_METADATA_MASK 0x000000000000ffff 603 604 605 606 607 #define RX_MSDU_END_SA_SW_PEER_ID_OFFSET 0x0000000000000038 608 #define RX_MSDU_END_SA_SW_PEER_ID_LSB 16 609 #define RX_MSDU_END_SA_SW_PEER_ID_MSB 31 610 #define RX_MSDU_END_SA_SW_PEER_ID_MASK 0x00000000ffff0000 611 612 613 614 615 #define RX_MSDU_END_AGGREGATION_COUNT_OFFSET 0x0000000000000038 616 #define RX_MSDU_END_AGGREGATION_COUNT_LSB 32 617 #define RX_MSDU_END_AGGREGATION_COUNT_MSB 39 618 #define RX_MSDU_END_AGGREGATION_COUNT_MASK 0x000000ff00000000 619 620 621 622 623 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_OFFSET 0x0000000000000038 624 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_LSB 40 625 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_MSB 40 626 #define RX_MSDU_END_FLOW_AGGREGATION_CONTINUATION_MASK 0x0000010000000000 627 628 629 630 631 #define RX_MSDU_END_FISA_TIMEOUT_OFFSET 0x0000000000000038 632 #define RX_MSDU_END_FISA_TIMEOUT_LSB 41 633 #define RX_MSDU_END_FISA_TIMEOUT_MSB 41 634 #define RX_MSDU_END_FISA_TIMEOUT_MASK 0x0000020000000000 635 636 637 638 639 #define RX_MSDU_END_RESERVED_15A_OFFSET 0x0000000000000038 640 #define RX_MSDU_END_RESERVED_15A_LSB 42 641 #define RX_MSDU_END_RESERVED_15A_MSB 63 642 #define RX_MSDU_END_RESERVED_15A_MASK 0xfffffc0000000000 643 644 645 646 647 #define RX_MSDU_END_CUMULATIVE_L4_CHECKSUM_OFFSET 0x0000000000000040 648 #define RX_MSDU_END_CUMULATIVE_L4_CHECKSUM_LSB 0 649 #define RX_MSDU_END_CUMULATIVE_L4_CHECKSUM_MSB 15 650 #define RX_MSDU_END_CUMULATIVE_L4_CHECKSUM_MASK 0x000000000000ffff 651 652 653 654 655 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_OFFSET 0x0000000000000040 656 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_LSB 16 657 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_MSB 31 658 #define RX_MSDU_END_CUMULATIVE_IP_LENGTH_MASK 0x00000000ffff0000 659 660 661 662 663 #define RX_MSDU_END_RESERVED_17A_OFFSET 0x0000000000000040 664 #define RX_MSDU_END_RESERVED_17A_LSB 32 665 #define RX_MSDU_END_RESERVED_17A_MSB 37 666 #define RX_MSDU_END_RESERVED_17A_MASK 0x0000003f00000000 667 668 669 670 671 #define RX_MSDU_END_SERVICE_CODE_OFFSET 0x0000000000000040 672 #define RX_MSDU_END_SERVICE_CODE_LSB 38 673 #define RX_MSDU_END_SERVICE_CODE_MSB 46 674 #define RX_MSDU_END_SERVICE_CODE_MASK 0x00007fc000000000 675 676 677 678 679 #define RX_MSDU_END_PRIORITY_VALID_OFFSET 0x0000000000000040 680 #define RX_MSDU_END_PRIORITY_VALID_LSB 47 681 #define RX_MSDU_END_PRIORITY_VALID_MSB 47 682 #define RX_MSDU_END_PRIORITY_VALID_MASK 0x0000800000000000 683 684 685 686 687 #define RX_MSDU_END_INTRA_BSS_OFFSET 0x0000000000000040 688 #define RX_MSDU_END_INTRA_BSS_LSB 48 689 #define RX_MSDU_END_INTRA_BSS_MSB 48 690 #define RX_MSDU_END_INTRA_BSS_MASK 0x0001000000000000 691 692 693 694 695 #define RX_MSDU_END_DEST_CHIP_ID_OFFSET 0x0000000000000040 696 #define RX_MSDU_END_DEST_CHIP_ID_LSB 49 697 #define RX_MSDU_END_DEST_CHIP_ID_MSB 50 698 #define RX_MSDU_END_DEST_CHIP_ID_MASK 0x0006000000000000 699 700 701 702 703 #define RX_MSDU_END_MULTICAST_ECHO_OFFSET 0x0000000000000040 704 #define RX_MSDU_END_MULTICAST_ECHO_LSB 51 705 #define RX_MSDU_END_MULTICAST_ECHO_MSB 51 706 #define RX_MSDU_END_MULTICAST_ECHO_MASK 0x0008000000000000 707 708 709 710 711 #define RX_MSDU_END_WDS_LEARNING_EVENT_OFFSET 0x0000000000000040 712 #define RX_MSDU_END_WDS_LEARNING_EVENT_LSB 52 713 #define RX_MSDU_END_WDS_LEARNING_EVENT_MSB 52 714 #define RX_MSDU_END_WDS_LEARNING_EVENT_MASK 0x0010000000000000 715 716 717 718 719 #define RX_MSDU_END_WDS_ROAMING_EVENT_OFFSET 0x0000000000000040 720 #define RX_MSDU_END_WDS_ROAMING_EVENT_LSB 53 721 #define RX_MSDU_END_WDS_ROAMING_EVENT_MSB 53 722 #define RX_MSDU_END_WDS_ROAMING_EVENT_MASK 0x0020000000000000 723 724 725 726 727 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_OFFSET 0x0000000000000040 728 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_LSB 54 729 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_MSB 54 730 #define RX_MSDU_END_WDS_KEEP_ALIVE_EVENT_MASK 0x0040000000000000 731 732 733 734 735 #define RX_MSDU_END_RESERVED_17B_OFFSET 0x0000000000000040 736 #define RX_MSDU_END_RESERVED_17B_LSB 55 737 #define RX_MSDU_END_RESERVED_17B_MSB 63 738 #define RX_MSDU_END_RESERVED_17B_MASK 0xff80000000000000 739 740 741 742 743 #define RX_MSDU_END_MSDU_LENGTH_OFFSET 0x0000000000000048 744 #define RX_MSDU_END_MSDU_LENGTH_LSB 0 745 #define RX_MSDU_END_MSDU_LENGTH_MSB 13 746 #define RX_MSDU_END_MSDU_LENGTH_MASK 0x0000000000003fff 747 748 749 750 751 #define RX_MSDU_END_STBC_OFFSET 0x0000000000000048 752 #define RX_MSDU_END_STBC_LSB 14 753 #define RX_MSDU_END_STBC_MSB 14 754 #define RX_MSDU_END_STBC_MASK 0x0000000000004000 755 756 757 758 759 #define RX_MSDU_END_IPSEC_ESP_OFFSET 0x0000000000000048 760 #define RX_MSDU_END_IPSEC_ESP_LSB 15 761 #define RX_MSDU_END_IPSEC_ESP_MSB 15 762 #define RX_MSDU_END_IPSEC_ESP_MASK 0x0000000000008000 763 764 765 766 767 #define RX_MSDU_END_L3_OFFSET_OFFSET 0x0000000000000048 768 #define RX_MSDU_END_L3_OFFSET_LSB 16 769 #define RX_MSDU_END_L3_OFFSET_MSB 22 770 #define RX_MSDU_END_L3_OFFSET_MASK 0x00000000007f0000 771 772 773 774 775 #define RX_MSDU_END_IPSEC_AH_OFFSET 0x0000000000000048 776 #define RX_MSDU_END_IPSEC_AH_LSB 23 777 #define RX_MSDU_END_IPSEC_AH_MSB 23 778 #define RX_MSDU_END_IPSEC_AH_MASK 0x0000000000800000 779 780 781 782 783 #define RX_MSDU_END_L4_OFFSET_OFFSET 0x0000000000000048 784 #define RX_MSDU_END_L4_OFFSET_LSB 24 785 #define RX_MSDU_END_L4_OFFSET_MSB 31 786 #define RX_MSDU_END_L4_OFFSET_MASK 0x00000000ff000000 787 788 789 790 791 #define RX_MSDU_END_MSDU_NUMBER_OFFSET 0x0000000000000048 792 #define RX_MSDU_END_MSDU_NUMBER_LSB 32 793 #define RX_MSDU_END_MSDU_NUMBER_MSB 39 794 #define RX_MSDU_END_MSDU_NUMBER_MASK 0x000000ff00000000 795 796 797 798 799 #define RX_MSDU_END_DECAP_FORMAT_OFFSET 0x0000000000000048 800 #define RX_MSDU_END_DECAP_FORMAT_LSB 40 801 #define RX_MSDU_END_DECAP_FORMAT_MSB 41 802 #define RX_MSDU_END_DECAP_FORMAT_MASK 0x0000030000000000 803 804 805 806 807 #define RX_MSDU_END_IPV4_PROTO_OFFSET 0x0000000000000048 808 #define RX_MSDU_END_IPV4_PROTO_LSB 42 809 #define RX_MSDU_END_IPV4_PROTO_MSB 42 810 #define RX_MSDU_END_IPV4_PROTO_MASK 0x0000040000000000 811 812 813 814 815 #define RX_MSDU_END_IPV6_PROTO_OFFSET 0x0000000000000048 816 #define RX_MSDU_END_IPV6_PROTO_LSB 43 817 #define RX_MSDU_END_IPV6_PROTO_MSB 43 818 #define RX_MSDU_END_IPV6_PROTO_MASK 0x0000080000000000 819 820 821 822 823 #define RX_MSDU_END_TCP_PROTO_OFFSET 0x0000000000000048 824 #define RX_MSDU_END_TCP_PROTO_LSB 44 825 #define RX_MSDU_END_TCP_PROTO_MSB 44 826 #define RX_MSDU_END_TCP_PROTO_MASK 0x0000100000000000 827 828 829 830 831 #define RX_MSDU_END_UDP_PROTO_OFFSET 0x0000000000000048 832 #define RX_MSDU_END_UDP_PROTO_LSB 45 833 #define RX_MSDU_END_UDP_PROTO_MSB 45 834 #define RX_MSDU_END_UDP_PROTO_MASK 0x0000200000000000 835 836 837 838 839 #define RX_MSDU_END_IP_FRAG_OFFSET 0x0000000000000048 840 #define RX_MSDU_END_IP_FRAG_LSB 46 841 #define RX_MSDU_END_IP_FRAG_MSB 46 842 #define RX_MSDU_END_IP_FRAG_MASK 0x0000400000000000 843 844 845 846 847 #define RX_MSDU_END_TCP_ONLY_ACK_OFFSET 0x0000000000000048 848 #define RX_MSDU_END_TCP_ONLY_ACK_LSB 47 849 #define RX_MSDU_END_TCP_ONLY_ACK_MSB 47 850 #define RX_MSDU_END_TCP_ONLY_ACK_MASK 0x0000800000000000 851 852 853 854 855 #define RX_MSDU_END_DA_IS_BCAST_MCAST_OFFSET 0x0000000000000048 856 #define RX_MSDU_END_DA_IS_BCAST_MCAST_LSB 48 857 #define RX_MSDU_END_DA_IS_BCAST_MCAST_MSB 48 858 #define RX_MSDU_END_DA_IS_BCAST_MCAST_MASK 0x0001000000000000 859 860 861 862 863 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_OFFSET 0x0000000000000048 864 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_LSB 49 865 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_MSB 50 866 #define RX_MSDU_END_TOEPLITZ_HASH_SEL_MASK 0x0006000000000000 867 868 869 870 871 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_OFFSET 0x0000000000000048 872 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_LSB 51 873 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_MSB 51 874 #define RX_MSDU_END_IP_FIXED_HEADER_VALID_MASK 0x0008000000000000 875 876 877 878 879 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_OFFSET 0x0000000000000048 880 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_LSB 52 881 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_MSB 52 882 #define RX_MSDU_END_IP_EXTN_HEADER_VALID_MASK 0x0010000000000000 883 884 885 886 887 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_OFFSET 0x0000000000000048 888 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_LSB 53 889 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_MSB 53 890 #define RX_MSDU_END_TCP_UDP_HEADER_VALID_MASK 0x0020000000000000 891 892 893 894 895 #define RX_MSDU_END_MESH_CONTROL_PRESENT_OFFSET 0x0000000000000048 896 #define RX_MSDU_END_MESH_CONTROL_PRESENT_LSB 54 897 #define RX_MSDU_END_MESH_CONTROL_PRESENT_MSB 54 898 #define RX_MSDU_END_MESH_CONTROL_PRESENT_MASK 0x0040000000000000 899 900 901 902 903 #define RX_MSDU_END_LDPC_OFFSET 0x0000000000000048 904 #define RX_MSDU_END_LDPC_LSB 55 905 #define RX_MSDU_END_LDPC_MSB 55 906 #define RX_MSDU_END_LDPC_MASK 0x0080000000000000 907 908 909 910 911 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET 0x0000000000000048 912 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB 56 913 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_MSB 63 914 #define RX_MSDU_END_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK 0xff00000000000000 915 916 917 918 919 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_OFFSET 0x0000000000000050 920 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_LSB 0 921 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_MSB 31 922 #define RX_MSDU_END_TOEPLITZ_HASH_2_OR_4_MASK 0x00000000ffffffff 923 924 925 926 927 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_OFFSET 0x0000000000000050 928 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_LSB 32 929 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_MSB 63 930 #define RX_MSDU_END_FLOW_ID_TOEPLITZ_MASK 0xffffffff00000000 931 932 933 934 935 #define RX_MSDU_END_USER_RSSI_OFFSET 0x0000000000000058 936 #define RX_MSDU_END_USER_RSSI_LSB 0 937 #define RX_MSDU_END_USER_RSSI_MSB 7 938 #define RX_MSDU_END_USER_RSSI_MASK 0x00000000000000ff 939 940 941 942 943 #define RX_MSDU_END_PKT_TYPE_OFFSET 0x0000000000000058 944 #define RX_MSDU_END_PKT_TYPE_LSB 8 945 #define RX_MSDU_END_PKT_TYPE_MSB 11 946 #define RX_MSDU_END_PKT_TYPE_MASK 0x0000000000000f00 947 948 949 950 951 #define RX_MSDU_END_SGI_OFFSET 0x0000000000000058 952 #define RX_MSDU_END_SGI_LSB 12 953 #define RX_MSDU_END_SGI_MSB 13 954 #define RX_MSDU_END_SGI_MASK 0x0000000000003000 955 956 957 958 959 #define RX_MSDU_END_RATE_MCS_OFFSET 0x0000000000000058 960 #define RX_MSDU_END_RATE_MCS_LSB 14 961 #define RX_MSDU_END_RATE_MCS_MSB 17 962 #define RX_MSDU_END_RATE_MCS_MASK 0x000000000003c000 963 964 965 966 967 #define RX_MSDU_END_RECEIVE_BANDWIDTH_OFFSET 0x0000000000000058 968 #define RX_MSDU_END_RECEIVE_BANDWIDTH_LSB 18 969 #define RX_MSDU_END_RECEIVE_BANDWIDTH_MSB 20 970 #define RX_MSDU_END_RECEIVE_BANDWIDTH_MASK 0x00000000001c0000 971 972 973 974 975 #define RX_MSDU_END_RECEPTION_TYPE_OFFSET 0x0000000000000058 976 #define RX_MSDU_END_RECEPTION_TYPE_LSB 21 977 #define RX_MSDU_END_RECEPTION_TYPE_MSB 23 978 #define RX_MSDU_END_RECEPTION_TYPE_MASK 0x0000000000e00000 979 980 981 982 983 #define RX_MSDU_END_MIMO_SS_BITMAP_OFFSET 0x0000000000000058 984 #define RX_MSDU_END_MIMO_SS_BITMAP_LSB 24 985 #define RX_MSDU_END_MIMO_SS_BITMAP_MSB 31 986 #define RX_MSDU_END_MIMO_SS_BITMAP_MASK 0x00000000ff000000 987 988 989 990 991 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_OFFSET 0x0000000000000058 992 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_LSB 32 993 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_MSB 63 994 #define RX_MSDU_END_PPDU_START_TIMESTAMP_31_0_MASK 0xffffffff00000000 995 996 997 998 999 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_OFFSET 0x0000000000000060 1000 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_LSB 0 1001 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_MSB 31 1002 #define RX_MSDU_END_PPDU_START_TIMESTAMP_63_32_MASK 0x00000000ffffffff 1003 1004 1005 1006 1007 #define RX_MSDU_END_SW_PHY_META_DATA_OFFSET 0x0000000000000060 1008 #define RX_MSDU_END_SW_PHY_META_DATA_LSB 32 1009 #define RX_MSDU_END_SW_PHY_META_DATA_MSB 63 1010 #define RX_MSDU_END_SW_PHY_META_DATA_MASK 0xffffffff00000000 1011 1012 1013 1014 1015 #define RX_MSDU_END_VLAN_CTAG_CI_OFFSET 0x0000000000000068 1016 #define RX_MSDU_END_VLAN_CTAG_CI_LSB 0 1017 #define RX_MSDU_END_VLAN_CTAG_CI_MSB 15 1018 #define RX_MSDU_END_VLAN_CTAG_CI_MASK 0x000000000000ffff 1019 1020 1021 1022 1023 #define RX_MSDU_END_VLAN_STAG_CI_OFFSET 0x0000000000000068 1024 #define RX_MSDU_END_VLAN_STAG_CI_LSB 16 1025 #define RX_MSDU_END_VLAN_STAG_CI_MSB 31 1026 #define RX_MSDU_END_VLAN_STAG_CI_MASK 0x00000000ffff0000 1027 1028 1029 1030 1031 #define RX_MSDU_END_RESERVED_27A_OFFSET 0x0000000000000068 1032 #define RX_MSDU_END_RESERVED_27A_LSB 32 1033 #define RX_MSDU_END_RESERVED_27A_MSB 63 1034 #define RX_MSDU_END_RESERVED_27A_MASK 0xffffffff00000000 1035 1036 1037 1038 1039 #define RX_MSDU_END_RESERVED_28A_OFFSET 0x0000000000000070 1040 #define RX_MSDU_END_RESERVED_28A_LSB 0 1041 #define RX_MSDU_END_RESERVED_28A_MSB 31 1042 #define RX_MSDU_END_RESERVED_28A_MASK 0x00000000ffffffff 1043 1044 1045 1046 1047 #define RX_MSDU_END_RESERVED_29A_OFFSET 0x0000000000000070 1048 #define RX_MSDU_END_RESERVED_29A_LSB 32 1049 #define RX_MSDU_END_RESERVED_29A_MSB 63 1050 #define RX_MSDU_END_RESERVED_29A_MASK 0xffffffff00000000 1051 1052 1053 1054 1055 #define RX_MSDU_END_FIRST_MPDU_OFFSET 0x0000000000000078 1056 #define RX_MSDU_END_FIRST_MPDU_LSB 0 1057 #define RX_MSDU_END_FIRST_MPDU_MSB 0 1058 #define RX_MSDU_END_FIRST_MPDU_MASK 0x0000000000000001 1059 1060 1061 1062 1063 #define RX_MSDU_END_RESERVED_30A_OFFSET 0x0000000000000078 1064 #define RX_MSDU_END_RESERVED_30A_LSB 1 1065 #define RX_MSDU_END_RESERVED_30A_MSB 1 1066 #define RX_MSDU_END_RESERVED_30A_MASK 0x0000000000000002 1067 1068 1069 1070 1071 #define RX_MSDU_END_MCAST_BCAST_OFFSET 0x0000000000000078 1072 #define RX_MSDU_END_MCAST_BCAST_LSB 2 1073 #define RX_MSDU_END_MCAST_BCAST_MSB 2 1074 #define RX_MSDU_END_MCAST_BCAST_MASK 0x0000000000000004 1075 1076 1077 1078 1079 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_OFFSET 0x0000000000000078 1080 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_LSB 3 1081 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_MSB 3 1082 #define RX_MSDU_END_AST_INDEX_NOT_FOUND_MASK 0x0000000000000008 1083 1084 1085 1086 1087 #define RX_MSDU_END_AST_INDEX_TIMEOUT_OFFSET 0x0000000000000078 1088 #define RX_MSDU_END_AST_INDEX_TIMEOUT_LSB 4 1089 #define RX_MSDU_END_AST_INDEX_TIMEOUT_MSB 4 1090 #define RX_MSDU_END_AST_INDEX_TIMEOUT_MASK 0x0000000000000010 1091 1092 1093 1094 1095 #define RX_MSDU_END_POWER_MGMT_OFFSET 0x0000000000000078 1096 #define RX_MSDU_END_POWER_MGMT_LSB 5 1097 #define RX_MSDU_END_POWER_MGMT_MSB 5 1098 #define RX_MSDU_END_POWER_MGMT_MASK 0x0000000000000020 1099 1100 1101 1102 1103 #define RX_MSDU_END_NON_QOS_OFFSET 0x0000000000000078 1104 #define RX_MSDU_END_NON_QOS_LSB 6 1105 #define RX_MSDU_END_NON_QOS_MSB 6 1106 #define RX_MSDU_END_NON_QOS_MASK 0x0000000000000040 1107 1108 1109 1110 1111 #define RX_MSDU_END_NULL_DATA_OFFSET 0x0000000000000078 1112 #define RX_MSDU_END_NULL_DATA_LSB 7 1113 #define RX_MSDU_END_NULL_DATA_MSB 7 1114 #define RX_MSDU_END_NULL_DATA_MASK 0x0000000000000080 1115 1116 1117 1118 1119 #define RX_MSDU_END_MGMT_TYPE_OFFSET 0x0000000000000078 1120 #define RX_MSDU_END_MGMT_TYPE_LSB 8 1121 #define RX_MSDU_END_MGMT_TYPE_MSB 8 1122 #define RX_MSDU_END_MGMT_TYPE_MASK 0x0000000000000100 1123 1124 1125 1126 1127 #define RX_MSDU_END_CTRL_TYPE_OFFSET 0x0000000000000078 1128 #define RX_MSDU_END_CTRL_TYPE_LSB 9 1129 #define RX_MSDU_END_CTRL_TYPE_MSB 9 1130 #define RX_MSDU_END_CTRL_TYPE_MASK 0x0000000000000200 1131 1132 1133 1134 1135 #define RX_MSDU_END_MORE_DATA_OFFSET 0x0000000000000078 1136 #define RX_MSDU_END_MORE_DATA_LSB 10 1137 #define RX_MSDU_END_MORE_DATA_MSB 10 1138 #define RX_MSDU_END_MORE_DATA_MASK 0x0000000000000400 1139 1140 1141 1142 1143 #define RX_MSDU_END_EOSP_OFFSET 0x0000000000000078 1144 #define RX_MSDU_END_EOSP_LSB 11 1145 #define RX_MSDU_END_EOSP_MSB 11 1146 #define RX_MSDU_END_EOSP_MASK 0x0000000000000800 1147 1148 1149 1150 1151 #define RX_MSDU_END_A_MSDU_ERROR_OFFSET 0x0000000000000078 1152 #define RX_MSDU_END_A_MSDU_ERROR_LSB 12 1153 #define RX_MSDU_END_A_MSDU_ERROR_MSB 12 1154 #define RX_MSDU_END_A_MSDU_ERROR_MASK 0x0000000000001000 1155 1156 1157 1158 1159 #define RX_MSDU_END_FRAGMENT_FLAG_OFFSET 0x0000000000000078 1160 #define RX_MSDU_END_FRAGMENT_FLAG_LSB 13 1161 #define RX_MSDU_END_FRAGMENT_FLAG_MSB 13 1162 #define RX_MSDU_END_FRAGMENT_FLAG_MASK 0x0000000000002000 1163 1164 1165 1166 1167 #define RX_MSDU_END_ORDER_OFFSET 0x0000000000000078 1168 #define RX_MSDU_END_ORDER_LSB 14 1169 #define RX_MSDU_END_ORDER_MSB 14 1170 #define RX_MSDU_END_ORDER_MASK 0x0000000000004000 1171 1172 1173 1174 1175 #define RX_MSDU_END_CCE_MATCH_OFFSET 0x0000000000000078 1176 #define RX_MSDU_END_CCE_MATCH_LSB 15 1177 #define RX_MSDU_END_CCE_MATCH_MSB 15 1178 #define RX_MSDU_END_CCE_MATCH_MASK 0x0000000000008000 1179 1180 1181 1182 1183 #define RX_MSDU_END_OVERFLOW_ERR_OFFSET 0x0000000000000078 1184 #define RX_MSDU_END_OVERFLOW_ERR_LSB 16 1185 #define RX_MSDU_END_OVERFLOW_ERR_MSB 16 1186 #define RX_MSDU_END_OVERFLOW_ERR_MASK 0x0000000000010000 1187 1188 1189 1190 1191 #define RX_MSDU_END_MSDU_LENGTH_ERR_OFFSET 0x0000000000000078 1192 #define RX_MSDU_END_MSDU_LENGTH_ERR_LSB 17 1193 #define RX_MSDU_END_MSDU_LENGTH_ERR_MSB 17 1194 #define RX_MSDU_END_MSDU_LENGTH_ERR_MASK 0x0000000000020000 1195 1196 1197 1198 1199 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_OFFSET 0x0000000000000078 1200 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_LSB 18 1201 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_MSB 18 1202 #define RX_MSDU_END_TCP_UDP_CHKSUM_FAIL_MASK 0x0000000000040000 1203 1204 1205 1206 1207 #define RX_MSDU_END_IP_CHKSUM_FAIL_OFFSET 0x0000000000000078 1208 #define RX_MSDU_END_IP_CHKSUM_FAIL_LSB 19 1209 #define RX_MSDU_END_IP_CHKSUM_FAIL_MSB 19 1210 #define RX_MSDU_END_IP_CHKSUM_FAIL_MASK 0x0000000000080000 1211 1212 1213 1214 1215 #define RX_MSDU_END_SA_IDX_INVALID_OFFSET 0x0000000000000078 1216 #define RX_MSDU_END_SA_IDX_INVALID_LSB 20 1217 #define RX_MSDU_END_SA_IDX_INVALID_MSB 20 1218 #define RX_MSDU_END_SA_IDX_INVALID_MASK 0x0000000000100000 1219 1220 1221 1222 1223 #define RX_MSDU_END_DA_IDX_INVALID_OFFSET 0x0000000000000078 1224 #define RX_MSDU_END_DA_IDX_INVALID_LSB 21 1225 #define RX_MSDU_END_DA_IDX_INVALID_MSB 21 1226 #define RX_MSDU_END_DA_IDX_INVALID_MASK 0x0000000000200000 1227 1228 1229 1230 1231 #define RX_MSDU_END_RESERVED_30B_OFFSET 0x0000000000000078 1232 #define RX_MSDU_END_RESERVED_30B_LSB 22 1233 #define RX_MSDU_END_RESERVED_30B_MSB 22 1234 #define RX_MSDU_END_RESERVED_30B_MASK 0x0000000000400000 1235 1236 1237 1238 1239 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_OFFSET 0x0000000000000078 1240 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_LSB 23 1241 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_MSB 23 1242 #define RX_MSDU_END_RX_IN_TX_DECRYPT_BYP_MASK 0x0000000000800000 1243 1244 1245 1246 1247 #define RX_MSDU_END_ENCRYPT_REQUIRED_OFFSET 0x0000000000000078 1248 #define RX_MSDU_END_ENCRYPT_REQUIRED_LSB 24 1249 #define RX_MSDU_END_ENCRYPT_REQUIRED_MSB 24 1250 #define RX_MSDU_END_ENCRYPT_REQUIRED_MASK 0x0000000001000000 1251 1252 1253 1254 1255 #define RX_MSDU_END_DIRECTED_OFFSET 0x0000000000000078 1256 #define RX_MSDU_END_DIRECTED_LSB 25 1257 #define RX_MSDU_END_DIRECTED_MSB 25 1258 #define RX_MSDU_END_DIRECTED_MASK 0x0000000002000000 1259 1260 1261 1262 1263 #define RX_MSDU_END_BUFFER_FRAGMENT_OFFSET 0x0000000000000078 1264 #define RX_MSDU_END_BUFFER_FRAGMENT_LSB 26 1265 #define RX_MSDU_END_BUFFER_FRAGMENT_MSB 26 1266 #define RX_MSDU_END_BUFFER_FRAGMENT_MASK 0x0000000004000000 1267 1268 1269 1270 1271 #define RX_MSDU_END_MPDU_LENGTH_ERR_OFFSET 0x0000000000000078 1272 #define RX_MSDU_END_MPDU_LENGTH_ERR_LSB 27 1273 #define RX_MSDU_END_MPDU_LENGTH_ERR_MSB 27 1274 #define RX_MSDU_END_MPDU_LENGTH_ERR_MASK 0x0000000008000000 1275 1276 1277 1278 1279 #define RX_MSDU_END_TKIP_MIC_ERR_OFFSET 0x0000000000000078 1280 #define RX_MSDU_END_TKIP_MIC_ERR_LSB 28 1281 #define RX_MSDU_END_TKIP_MIC_ERR_MSB 28 1282 #define RX_MSDU_END_TKIP_MIC_ERR_MASK 0x0000000010000000 1283 1284 1285 1286 1287 #define RX_MSDU_END_DECRYPT_ERR_OFFSET 0x0000000000000078 1288 #define RX_MSDU_END_DECRYPT_ERR_LSB 29 1289 #define RX_MSDU_END_DECRYPT_ERR_MSB 29 1290 #define RX_MSDU_END_DECRYPT_ERR_MASK 0x0000000020000000 1291 1292 1293 1294 1295 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_OFFSET 0x0000000000000078 1296 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_LSB 30 1297 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_MSB 30 1298 #define RX_MSDU_END_UNENCRYPTED_FRAME_ERR_MASK 0x0000000040000000 1299 1300 1301 1302 1303 #define RX_MSDU_END_FCS_ERR_OFFSET 0x0000000000000078 1304 #define RX_MSDU_END_FCS_ERR_LSB 31 1305 #define RX_MSDU_END_FCS_ERR_MSB 31 1306 #define RX_MSDU_END_FCS_ERR_MASK 0x0000000080000000 1307 1308 1309 1310 1311 #define RX_MSDU_END_RESERVED_31A_OFFSET 0x0000000000000078 1312 #define RX_MSDU_END_RESERVED_31A_LSB 32 1313 #define RX_MSDU_END_RESERVED_31A_MSB 41 1314 #define RX_MSDU_END_RESERVED_31A_MASK 0x000003ff00000000 1315 1316 1317 1318 1319 #define RX_MSDU_END_DECRYPT_STATUS_CODE_OFFSET 0x0000000000000078 1320 #define RX_MSDU_END_DECRYPT_STATUS_CODE_LSB 42 1321 #define RX_MSDU_END_DECRYPT_STATUS_CODE_MSB 44 1322 #define RX_MSDU_END_DECRYPT_STATUS_CODE_MASK 0x00001c0000000000 1323 1324 1325 1326 1327 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_OFFSET 0x0000000000000078 1328 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_LSB 45 1329 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_MSB 45 1330 #define RX_MSDU_END_RX_BITMAP_NOT_UPDATED_MASK 0x0000200000000000 1331 1332 1333 1334 1335 #define RX_MSDU_END_RESERVED_31B_OFFSET 0x0000000000000078 1336 #define RX_MSDU_END_RESERVED_31B_LSB 46 1337 #define RX_MSDU_END_RESERVED_31B_MSB 62 1338 #define RX_MSDU_END_RESERVED_31B_MASK 0x7fffc00000000000 1339 1340 1341 1342 1343 #define RX_MSDU_END_MSDU_DONE_OFFSET 0x0000000000000078 1344 #define RX_MSDU_END_MSDU_DONE_LSB 63 1345 #define RX_MSDU_END_MSDU_DONE_MSB 63 1346 #define RX_MSDU_END_MSDU_DONE_MASK 0x8000000000000000 1347 1348 1349 1350 #endif 1351