xref: /wlan-driver/qca-wifi-host-cmn/umac/dfs/core/src/dfs_phyerr_tlv.h (revision 5113495b16420b49004c444715d2daae2066e7dc)
1 /*
2  * Copyright (c) 2012, 2016-2017 The Linux Foundation. All rights reserved.
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 /**
19  * DOC: This file has Radar summary.
20  */
21 
22 #ifndef _DFS_PHYERR_TLV_H_
23 #define _DFS_PHYERR_TLV_H_
24 
25 /*
26  * Register manipulation macros that expect bit field defines
27  * to follow the convention that an _S suffix is appended for
28  * a shift count, while the field mask has no suffix.
29  */
30 #define SM(_v, _f) (((_v) << _f##_S) & _f)
31 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
32 
33 /* The TLV dword is at the beginning of each TLV section. */
34 #define TLV_REG   0x00
35 
36 #define TLV_LEN   0x0000FFFF
37 #define TLV_LEN_S 0
38 
39 #define TLV_SIG   0x00FF0000
40 #define TLV_SIG_S 16
41 
42 #define TLV_TAG   0xFF000000
43 #define TLV_TAG_S 24
44 
45 #define TAG_ID_SEARCH_FFT_REPORT   0xFB
46 #define TAG_ID_RADAR_PULSE_SUMMARY 0xF8
47 
48 /*
49  * Radar pulse summary
50  * + TYPE=0xF8 (Radar pulse summary report)
51  * + SIG=0xBB (baseband PHY generated TLV components)
52  */
53 
54 #define RADAR_REPORT_PULSE_REG_1      0x00
55 
56 #define RADAR_REPORT_PULSE_IS_CHIRP   0x80000000
57 #define RADAR_REPORT_PULSE_IS_CHIRP_S 31
58 
59 #define RADAR_REPORT_PULSE_IS_MAX_WIDTH   0x40000000
60 #define RADAR_REPORT_PULSE_IS_MAX_WIDTH_S 30
61 
62 #define RADAR_REPORT_AGC_TOTAL_GAIN   0x3FF00000
63 #define RADAR_REPORT_AGC_TOTAL_GAIN_S 20
64 
65 #define RADAR_REPORT_PULSE_DELTA_DIFF   0x000F0000
66 #define RADAR_REPORT_PULSE_DELTA_DIFF_S 16
67 
68 #define RADAR_REPORT_PULSE_DELTA_PEAK   0x0000FC00
69 #define RADAR_REPORT_PULSE_DELTA_PEAK_S 10
70 
71 #define RADAR_REPORT_PULSE_SIDX    0x000003FF
72 #define RADAR_REPORT_PULSE_SIDX_S  0x0
73 
74 #define RADAR_REPORT_PULSE_REG_2 0x01
75 
76 #define RADAR_REPORT_PULSE_SRCH_FFT_A_VALID   0x80000000
77 #define RADAR_REPORT_PULSE_SRCH_FFT_A_VALID_S 31
78 
79 #define RADAR_REPORT_PULSE_AGC_MB_GAIN   0x7F000000
80 #define RADAR_REPORT_PULSE_AGC_MB_GAIN_S 24
81 
82 #define RADAR_REPORT_PULSE_SUBCHAN_MASK   0x00FF0000
83 #define RADAR_REPORT_PULSE_SUBCHAN_MASK_S 16
84 
85 #define RADAR_REPORT_PULSE_TSF_OFFSET   0x0000FF00
86 #define RADAR_REPORT_PULSE_TSF_OFFSET_S 8
87 
88 #define RADAR_REPORT_PULSE_DUR   0x000000FF
89 #define RADAR_REPORT_PULSE_DUR_S 0
90 
91 #define SEARCH_FFT_REPORT_REG_1 0x00
92 
93 #define SEARCH_FFT_REPORT_TOTAL_GAIN_DB   0xFF800000
94 #define SEARCH_FFT_REPORT_TOTAL_GAIN_DB_S 23
95 
96 #define SEARCH_FFT_REPORT_BASE_PWR_DB     0x007FC000
97 #define SEARCH_FFT_REPORT_BASE_PWR_DB_S   14
98 
99 #define SEARCH_FFT_REPORT_FFT_CHN_IDX     0x00003000
100 #define SEARCH_FFT_REPORT_FFT_CHN_IDX_S   12
101 
102 #define SEARCH_FFT_REPORT_PEAK_SIDX       0x00000FFF
103 #define SEARCH_FFT_REPORT_PEAK_SIDX_S     0
104 
105 #define SEARCH_FFT_REPORT_REG_2 0x01
106 
107 #define SEARCH_FFT_REPORT_RELPWR_DB   0xFC000000
108 #define SEARCH_FFT_REPORT_RELPWR_DB_S 26
109 
110 #define SEARCH_FFT_REPORT_AVGPWR_DB   0x03FC0000
111 #define SEARCH_FFT_REPORT_AVGPWR_DB_S 18
112 
113 #define SEARCH_FFT_REPORT_PEAK_MAG    0x0003FF00
114 #define SEARCH_FFT_REPORT_PEAK_MAG_S  8
115 
116 #define SEARCH_FFT_REPORT_NUM_STR_BINS_IB   0x000000FF
117 #define SEARCH_FFT_REPORT_NUM_STR_BINS_IB_S 0
118 
119 #define SEARCH_FFT_REPORT_REG_3 0x02
120 
121 #define SEARCH_FFT_REPORT_SEG_ID   0x00000001
122 #define SEARCH_FFT_REPORT_SEG_ID_S 0
123 
124 /*
125  * Although this code is now not parsing the whole frame (descriptor
126  * and all), the relevant fields are still useful information
127  * for anyone who is working on the PHY error part of DFS pattern
128  * matching.
129  *
130  * However, to understand _where_ these descriptors start, you
131  * should do some digging into the peregrine descriptor format.
132  * The 30 second version: each RX ring has a bitmap listing which
133  * descriptors are to be included, and then a set of offsets
134  * into the RX buffer for where each descriptor will be written.
135  * It's not like the 802.11n generation hardware which has
136  * a fixed descriptor format.
137  */
138 
139 /* RX_PPDU_START */
140 #define RX_PPDU_START_LEN         (10*4)
141 #define RX_PPDU_START_REG_4       0x0004
142 #define RX_PPDU_START_RSSI_COMB   0x000000FF
143 #define RX_PPDU_START_RSSI_COMB_S 0
144 
145 /* RX_PPDU_END */
146 #define RX_PPDU_END_LEN (21*4)
147 #define RX_PPDU_END_REG_16          16
148 #define RX_PPDU_END_TSF_TIMESTAMP   0xFFFFFFFF
149 #define RX_PPDU_END_TSF_TIMESTAMP_S 0
150 #define RX_PPDU_END_REG_18         18
151 #define RX_PPDU_END_PHY_ERR_CODE   0x0000FF00
152 #define RX_PPDU_END_PHY_ERR_CODE_S 8
153 #define RX_PPDU_END_PHY_ERR        0x00010000
154 #define RX_PPDU_END_PHY_ERR_S      16
155 
156 /*
157  * The RSSI values can have "special meanings".
158  * If rssi=50, it means that the peak detector triggered.
159  */
160 #define RSSI_PEAK_DETECTOR_SAT 50
161 
162 /*
163  * If rssi=25, it means that the ADC was saturated, but that only is
164  * valid when there is one ADC gain change.  For short pulses this
165  * is true - you won't have time to do a gain change before the pulse
166  * goes away.  But for longer pulses, ADC gain changes can occur, so
167  * you'll get a more accurate RSSI figure.
168  *
169  * For short pulses (and the definition of "short" still isn't clear
170  * at the time of writing) there isn't any real time to do a gain change
171  * (or two, or three..) in order to get an accurate estimation of signal
172  * sizing.  Thus, RSSI will not be very accurate for short duration pulses.
173  * All you can really say for certain is that yes, there's a pulse that
174  * met the requirements of the pulse detector.
175  *
176  * For more information, see the 802.11ac Microarchitecture guide.
177  * (TODO: add a twiki reference.)
178  */
179 
180 #endif /* _DFS_PHYERR_TLV_H_ */
181