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Searched refs:cnss_pr_dbg (Results 1 – 8 of 8) sorted by relevance

/wlan-driver/platform/cnss2/
H A Dpower.c167 cnss_pr_dbg("Property %s %s, use default\n", prop_name, in cnss_get_vreg_single()
177 …cnss_pr_dbg("Got regulator: %s, min_uv: %u, max_uv: %u, load_ua: %u, delay_us: %u, need_unvote: %u… in cnss_get_vreg_single()
190 cnss_pr_dbg("Put regulator: %s\n", vreg->cfg.name); in cnss_put_vreg_single()
200 cnss_pr_dbg("Regulator %s is already enabled\n", in cnss_vreg_on_single()
205 cnss_pr_dbg("Regulator %s is being enabled\n", vreg->cfg.name); in cnss_vreg_on_single()
252 cnss_pr_dbg("Regulator %s is already disabled\n", in cnss_vreg_unvote_single()
257 cnss_pr_dbg("Removing vote for Regulator %s\n", vreg->cfg.name); in cnss_vreg_unvote_single()
282 cnss_pr_dbg("Regulator %s is already disabled\n", in cnss_vreg_off_single()
287 cnss_pr_dbg("Regulator %s is being disabled\n", in cnss_vreg_off_single()
354 cnss_pr_dbg("Vregs have already been updated\n"); in cnss_get_vreg()
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H A Dpci_qcom.c184 cnss_pr_dbg("PCIe DRV is %s\n", in cnss_pci_update_drv_supported()
216 cnss_pr_dbg("PCI link recover callback\n"); in cnss_pci_event_cb()
233 cnss_pr_dbg("PCI link down event callback\n"); in cnss_pci_event_cb()
237 cnss_pr_dbg("PCI Wake up event callback\n"); in cnss_pci_event_cb()
247 cnss_pr_dbg("DRV subsystem is connected\n"); in cnss_pci_event_cb()
251 cnss_pr_dbg("DRV subsystem is disconnected\n"); in cnss_pci_event_cb()
306 cnss_pr_dbg("ADSP power collapse already %s\n", in cnss_wlan_adsp_pc_enable()
321 cnss_pr_dbg("%s ADSP power collapse\n", control ? "Enable" : "Disable"); in cnss_wlan_adsp_pc_enable()
380 cnss_pr_dbg("Retry PCI link training #%d\n", retry); in cnss_set_pci_link()
381 cnss_pr_dbg("Value of SW_CTRL GPIO: %d\n", in cnss_set_pci_link()
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H A Dqmi.c143 cnss_pr_dbg("req %x success\n", req_id); in qmi_send_wait()
157 cnss_pr_dbg("Sending indication register message, state: 0x%lx\n", in cnss_wlfw_ind_register_send_sync()
288 cnss_pr_dbg("Sending host capability message, state: 0x%lx\n", in cnss_wlfw_host_cap_send_sync()
303 cnss_pr_dbg("Number of clients is %d\n", req->num_clients); in cnss_wlfw_host_cap_send_sync()
307 cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi); in cnss_wlfw_host_cap_send_sync()
322 cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done); in cnss_wlfw_host_cap_send_sync()
336 cnss_pr_dbg("Supported link speed in Host Cap %d\n", in cnss_wlfw_host_cap_send_sync()
347 cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n", in cnss_wlfw_host_cap_send_sync()
360 cnss_pr_dbg("Sending feature list 0x%llx\n", in cnss_wlfw_host_cap_send_sync()
420 cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n", in cnss_wlfw_respond_mem_send_sync()
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H A Dmain.c164 cnss_pr_dbg("Set plat_priv at %d", env_count); in cnss_set_plat_priv()
203 cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx); in cnss_clear_plat_priv()
263 cnss_pr_dbg("service_instance_id=0x%x\n", in cnss_get_qrtr_info()
329 cnss_pr_dbg("qcom,sleep-clk-support is %d\n", in cnss_get_sleep_clk_supported()
566 cnss_pr_dbg("Platform name: %s (%zu)\n", in cnss_get_platform_name()
582 cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n", in cnss_pm_stay_awake()
597 cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n", in cnss_pm_relax()
637 cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag); in cnss_get_platform_cap()
674 cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap, in cnss_get_fw_cap()
754 cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n", in cnss_wlan_enable()
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H A Dpci.c1118 cnss_pr_dbg("%ps: PCIe link is in suspend state\n", in cnss_pci_check_link_status()
1160 cnss_pr_dbg("Config PCIe remap window register to 0x%x\n", in cnss_pci_select_window()
1497 cnss_pr_dbg("Supported PCIe Link Speed: %d\n", in cnss_update_supported_link_info()
1516 cnss_pr_dbg("Get PCI link status register: %u\n", link_status); in cnss_pci_get_link_status()
1523 cnss_pr_dbg("Default PCI link speed is 0x%x, link width is 0x%x\n", in cnss_pci_get_link_status()
1551 cnss_pr_dbg("Start to dump SOC Scratch registers\n"); in cnss_pci_soc_scratch_reg_dump()
1557 cnss_pr_dbg("PCIE_SOC_REG_%s = 0x%x\n", in cnss_pci_soc_scratch_reg_dump()
1579 cnss_pr_dbg("Start to dump SOC Reset Cause registers\n"); in cnss_pci_soc_reset_cause_reg_dump()
1584 cnss_pr_dbg("WLAON_SOC_RESET_CAUSE_SHADOW_REG = 0x%x\n", in cnss_pci_soc_reset_cause_reg_dump()
1604 cnss_pr_dbg("Start to dump PCIE BHIE DEBUG registers\n"); in cnss_pci_bhi_debug_reg_dump()
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H A Dbus.c37 cnss_pr_dbg("Got bus type[%u] from dt\n", in cnss_get_bus_type()
583 cnss_pr_dbg("Unsupported bus type: %d\n", in cnss_bus_is_device_down()
598 cnss_pr_dbg("Unsupported bus type: %d\n", in cnss_bus_shutdown_cleanup()
613 cnss_pr_dbg("Unsupported bus type: %d\n", in cnss_bus_check_link_status()
628 cnss_pr_dbg("Unsupported bus type: %d\n", in cnss_bus_recover_link_down()
645 cnss_pr_dbg("Unsupported bus type: %d\n", in cnss_bus_debug_reg_read()
662 cnss_pr_dbg("Unsupported bus type: %d\n", in cnss_bus_debug_reg_write()
789 cnss_pr_dbg("Remove MHI satellite configuration\n"); in cnss_bus_disable_mhi_satellite_cfg()
794 cnss_pr_dbg("Unsupported bus type: %d, ignore disable mhi satellite cfg\n", in cnss_bus_disable_mhi_satellite_cfg()
H A Ddebug.c260 cnss_pr_dbg("Received dev_boot debug command: %s\n", cmd); in cnss_dev_boot_debug_write()
308 cnss_pr_dbg("Force set cold boot cal done status\n"); in cnss_dev_boot_debug_write()
449 cnss_pr_dbg("Read 0x%x from register offset 0x%x\n", reg_val, in cnss_reg_read_debug_write()
564 cnss_pr_dbg("Wrote 0x%x to register offset 0x%x\n", reg_val, in cnss_reg_write_debug_write()
622 cnss_pr_dbg("Received runtime_pm debug command: %s\n", cmd); in cnss_runtime_pm_debug_write()
H A Ddebug.h65 #define cnss_pr_dbg(_fmt, ...) \ macro