Searched refs:gtx_info (Results 1 – 9 of 9) sorted by relevance
52 struct wmi_gtx_config *gtx_info) in wmi_unified_vdev_set_gtx_cfg_cmd() argument57 gtx_info); in wmi_unified_vdev_set_gtx_cfg_cmd()
163 struct wmi_gtx_config *gtx_info) in send_vdev_set_gtx_cfg_cmd_tlv() argument181 cmd->gtxRTMask[0] = gtx_info->gtx_rt_mask[0]; in send_vdev_set_gtx_cfg_cmd_tlv()182 cmd->gtxRTMask[1] = gtx_info->gtx_rt_mask[1]; in send_vdev_set_gtx_cfg_cmd_tlv()183 cmd->userGtxMask = gtx_info->gtx_usrcfg; in send_vdev_set_gtx_cfg_cmd_tlv()184 cmd->gtxPERThreshold = gtx_info->gtx_threshold; in send_vdev_set_gtx_cfg_cmd_tlv()185 cmd->gtxPERMargin = gtx_info->gtx_margin; in send_vdev_set_gtx_cfg_cmd_tlv()186 cmd->gtxTPCstep = gtx_info->gtx_tpcstep; in send_vdev_set_gtx_cfg_cmd_tlv()187 cmd->gtxTPCMin = gtx_info->gtx_tpcmin; in send_vdev_set_gtx_cfg_cmd_tlv()188 cmd->gtxBWMask = gtx_info->gtx_bwmask; in send_vdev_set_gtx_cfg_cmd_tlv()
715 ret = intr[vdev_id].config.gtx_info.gtxRTMask[0]; in wma_cli_get_command()718 ret = intr[vdev_id].config.gtx_info.gtxRTMask[1]; in wma_cli_get_command()721 ret = intr[vdev_id].config.gtx_info.gtxUsrcfg; in wma_cli_get_command()724 ret = intr[vdev_id].config.gtx_info.gtxPERThreshold; in wma_cli_get_command()727 ret = intr[vdev_id].config.gtx_info.gtxPERMargin; in wma_cli_get_command()730 ret = intr[vdev_id].config.gtx_info.gtxTPCstep; in wma_cli_get_command()733 ret = intr[vdev_id].config.gtx_info.gtxTPCMin; in wma_cli_get_command()736 ret = intr[vdev_id].config.gtx_info.gtxBWMask; in wma_cli_get_command()897 ret = intr[vdev_id].config.gtx_info.gtxRTMask[0]; in wma_cli_get_command()900 ret = intr[vdev_id].config.gtx_info.gtxRTMask[1]; in wma_cli_get_command()[all …]
1832 gtx_config_t *gtx_info) in wmi_unified_vdev_set_gtx_cfg_send() argument1836 params.gtx_rt_mask[0] = gtx_info->gtxRTMask[0]; in wmi_unified_vdev_set_gtx_cfg_send()1837 params.gtx_rt_mask[1] = gtx_info->gtxRTMask[1]; in wmi_unified_vdev_set_gtx_cfg_send()1838 params.gtx_usrcfg = gtx_info->gtxUsrcfg; in wmi_unified_vdev_set_gtx_cfg_send()1839 params.gtx_threshold = gtx_info->gtxPERThreshold; in wmi_unified_vdev_set_gtx_cfg_send()1840 params.gtx_margin = gtx_info->gtxPERMargin; in wmi_unified_vdev_set_gtx_cfg_send()1841 params.gtx_tpcstep = gtx_info->gtxTPCstep; in wmi_unified_vdev_set_gtx_cfg_send()1842 params.gtx_tpcmin = gtx_info->gtxTPCMin; in wmi_unified_vdev_set_gtx_cfg_send()1843 params.gtx_bwmask = gtx_info->gtxBWMask; in wmi_unified_vdev_set_gtx_cfg_send()
3398 intr[vdev_id].config.gtx_info.gtxRTMask[0] = in wma_vdev_pre_start()3400 intr[vdev_id].config.gtx_info.gtxRTMask[1] = in wma_vdev_pre_start()3403 intr[vdev_id].config.gtx_info.gtxUsrcfg = in wma_vdev_pre_start()3406 intr[vdev_id].config.gtx_info.gtxPERThreshold = in wma_vdev_pre_start()3408 intr[vdev_id].config.gtx_info.gtxPERMargin = in wma_vdev_pre_start()3410 intr[vdev_id].config.gtx_info.gtxTPCstep = in wma_vdev_pre_start()3412 intr[vdev_id].config.gtx_info.gtxTPCMin = in wma_vdev_pre_start()3414 intr[vdev_id].config.gtx_info.gtxBWMask = in wma_vdev_pre_start()4175 &intr[vdev_id].config.gtx_info); in wma_vdev_set_bss_params()
74 struct wmi_gtx_config *gtx_info);
1242 struct wmi_gtx_config *gtx_info);
731 gtx_config_t *gtx_info);
629 gtx_config_t gtx_info; member