1 /* 2 * Copyright (c) 2011-2015, 2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _RX_DESC_H_ 20 #define _RX_DESC_H_ 21 22 /* 23 * REMIND: Copy one of rx_desc related structures here for export, 24 * hopes they are always the same between Peregrine and Rome in future 25 */ 26 struct rx_attention { 27 volatile 28 uint32_t first_mpdu:1, /* [0] */ 29 last_mpdu:1, /* [1] */ 30 mcast_bcast:1, /* [2] */ 31 peer_idx_invalid:1, /* [3] */ 32 peer_idx_timeout:1, /* [4] */ 33 power_mgmt:1, /* [5] */ 34 non_qos:1, /* [6] */ 35 null_data:1, /* [7] */ 36 mgmt_type:1, /* [8] */ 37 ctrl_type:1, /* [9] */ 38 more_data:1, /* [10] */ 39 eosp:1, /* [11] */ 40 u_apsd_trigger:1, /* [12] */ 41 fragment:1, /* [13] */ 42 order:1, /* [14] */ 43 classification:1, /* [15] */ 44 overflow_err:1, /* [16] */ 45 msdu_length_err:1, /* [17] */ 46 tcp_udp_chksum_fail:1, /* [18] */ 47 ip_chksum_fail:1, /* [19] */ 48 sa_idx_invalid:1, /* [20] */ 49 da_idx_invalid:1, /* [21] */ 50 sa_idx_timeout:1, /* [22] */ 51 da_idx_timeout:1, /* [23] */ 52 encrypt_required:1, /* [24] */ 53 directed:1, /* [25] */ 54 buffer_fragment:1, /* [26] */ 55 mpdu_length_err:1, /* [27] */ 56 tkip_mic_err:1, /* [28] */ 57 decrypt_err:1, /* [29] */ 58 fcs_err:1, /* [30] */ 59 msdu_done:1; /* [31] */ 60 }; 61 62 struct rx_frag_info { 63 volatile 64 uint32_t ring0_more_count:8, /* [7:0] */ 65 ring1_more_count:8, /* [15:8] */ 66 ring2_more_count:8, /* [23:16] */ 67 ring3_more_count:8; /* [31:24] */ 68 volatile 69 uint32_t ring4_more_count:8, /* [7:0] */ 70 ring5_more_count:8, /* [15:8] */ 71 ring6_more_count:8, /* [23:16] */ 72 ring7_more_count:8; /* [31:24] */ 73 }; 74 75 struct rx_msdu_start { 76 volatile 77 uint32_t msdu_length:14, /* [13:0] */ 78 #if defined(HELIUMPLUS) 79 l3_offset:7, /* [20:14] */ 80 ipsec_ah:1, /* [21] */ 81 reserved_0a:2, /* [23:22] */ 82 l4_offset:7, /* [30:24] */ 83 ipsec_esp:1; /* [31] */ 84 #else 85 ip_offset:6, /* [19:14] */ 86 ring_mask:4, /* [23:20] */ 87 tcp_udp_offset:7, /* [30:24] */ 88 reserved_0c:1; /* [31] */ 89 #endif /* defined(HELIUMPLUS) */ 90 #if defined(HELIUMPLUS) 91 volatile uint32_t flow_id_toeplitz:32; /* [31:0] */ 92 #else 93 volatile uint32_t flow_id_crc:32; /* [31:0] */ 94 #endif /* defined(HELIUMPLUS) */ 95 volatile 96 uint32_t msdu_number:8, /* [7:0] */ 97 decap_format:2, /* [9:8] */ 98 ipv4_proto:1, /* [10] */ 99 ipv6_proto:1, /* [11] */ 100 tcp_proto:1, /* [12] */ 101 udp_proto:1, /* [13] */ 102 ip_frag:1, /* [14] */ 103 tcp_only_ack:1, /* [15] */ 104 sa_idx:11, /* [26:16] */ 105 reserved_2b:5; /* [31:27] */ 106 #if defined(HELIUMPLUS) 107 volatile 108 uint32_t da_idx:11, /* [10:0] */ 109 da_is_bcast_mcast:1, /* [11] */ 110 reserved_3a:4, /* [15:12] */ 111 ip4_protocol_ip6_next_header:8, /* [23:16] */ 112 ring_mask:8; /* [31:24] */ 113 volatile uint32_t toeplitz_hash_2_or_4:32; /* [31:0] */ 114 #endif /* defined(HELIUMPLUS) */ 115 }; 116 117 struct rx_msdu_end { 118 volatile 119 uint32_t ip_hdr_chksum:16, /* [15:0] */ 120 tcp_udp_chksum:16; /* [31:16] */ 121 volatile 122 uint32_t key_id_octet:8, /* [7:0] */ 123 #if defined(HELIUMPLUS) 124 classification_rule:6, /* [13:8] */ 125 classify_not_done_truncate:1, /* [14] */ 126 classify_not_done_cce_dis:1, /* [15] */ 127 #else 128 classification_filter:8, /* [15:8] */ 129 #endif /* defined(HELIUMPLUS) */ 130 ext_wapi_pn_63_48:16; /* [31:16] */ 131 volatile uint32_t ext_wapi_pn_95_64:32; /* [31:0] */ 132 volatile uint32_t ext_wapi_pn_127_96:32; /* [31:0] */ 133 volatile 134 uint32_t reported_mpdu_length:14, /* [13:0] */ 135 first_msdu:1, /* [14] */ 136 last_msdu:1, /* [15] */ 137 #if defined(HELIUMPLUS) 138 sa_idx_timeout:1, /* [16] */ 139 da_idx_timeout:1, /* [17] */ 140 msdu_limit_error:1, /* [18] */ 141 classify_ring_mask:8, /* [26:19] */ 142 #endif /* defined(HELIUMPLUS) */ 143 reserved_3a:3, /* [29:27] */ 144 pre_delim_err:1, /* [30] */ 145 reserved_3b:1; /* [31] */ 146 #if defined(HELIUMPLUS) 147 volatile uint32_t ipv6_options_crc:32; 148 volatile uint32_t tcp_seq_number:32; 149 volatile uint32_t tcp_ack_number:32; 150 volatile 151 uint32_t tcp_flag:9, /* [8:0] */ 152 lro_eligible:1, /* [9] */ 153 l3_header_padding:3, /* [12:10] */ 154 reserved_8a:3, /* [15:13] */ 155 window_size:16; /* [31:16] */ 156 volatile 157 uint32_t da_offset:6, /* [5:0] */ 158 sa_offset:6, /* [11:6] */ 159 da_offset_valid:1, /* [12] */ 160 sa_offset_valid:1, /* [13] */ 161 type_offset:7, /* [20:14] */ 162 reserved_9a:11; /* [31:21] */ 163 volatile uint32_t rule_indication_31_0:32; 164 volatile uint32_t rule_indication_63_32:32; 165 volatile uint32_t rule_indication_95_64:32; 166 volatile uint32_t rule_indication_127_96:32; 167 #endif /* defined(HELIUMPLUS) */ 168 }; 169 170 struct rx_mpdu_end { 171 volatile 172 uint32_t reserved_0:13, /* [12:0] */ 173 overflow_err:1, /* [13] */ 174 last_mpdu:1, /* [14] */ 175 post_delim_err:1, /* [15] */ 176 post_delim_cnt:12, /* [27:16] */ 177 mpdu_length_err:1, /* [28] */ 178 tkip_mic_err:1, /* [29] */ 179 decrypt_err:1, /* [30] */ 180 fcs_err:1; /* [31] */ 181 }; 182 183 184 #if defined(HELIUMPLUS) 185 186 struct rx_mpdu_start { 187 volatile 188 uint32_t peer_idx:11, /* [10:0] */ 189 fr_ds:1, /* [11] */ 190 to_ds:1, /* [12] */ 191 encrypted:1, /* [13] */ 192 retry:1, /* [14] */ 193 reserved:1, /* [15] */ 194 seq_num:12, /* [27:16] */ 195 encrypt_type:4; /* [31:28] */ 196 volatile uint32_t pn_31_0:32; /* [31:0] */ 197 volatile 198 uint32_t pn_47_32:16, /* [15:0] */ 199 toeplitz_hash:2, /* [17:16] */ 200 reserved_2:10, /* [27:18] */ 201 tid:4; /* [31:28] */ 202 }; 203 204 205 struct rx_ppdu_start { 206 volatile 207 uint32_t rssi_pri_chain0:8, /* [7:0] */ 208 rssi_sec20_chain0:8, /* [15:8] */ 209 rssi_sec40_chain0:8, /* [23:16] */ 210 rssi_sec80_chain0:8; /* [31:24] */ 211 volatile 212 uint32_t rssi_pri_chain1:8, /* [7:0] */ 213 rssi_sec20_chain1:8, /* [15:8] */ 214 rssi_sec40_chain1:8, /* [23:16] */ 215 rssi_sec80_chain1:8; /* [31:24] */ 216 volatile 217 uint32_t rssi_pri_chain2:8, /* [7:0] */ 218 rssi_sec20_chain2:8, /* [15:8] */ 219 rssi_sec40_chain2:8, /* [23:16] */ 220 rssi_sec80_chain2:8; /* [31:24] */ 221 volatile 222 uint32_t rssi_pri_chain3:8, /* [7:0] */ 223 rssi_sec20_chain3:8, /* [15:8] */ 224 rssi_sec40_chain3:8, /* [23:16] */ 225 rssi_sec80_chain3:8; /* [31:24] */ 226 volatile 227 uint32_t rssi_comb:8, /* [7:0] */ 228 bandwidth:3, /* [10:8] */ 229 reserved_4a:5, /* [15:11] */ 230 rssi_comb_ht:8, /* [23:16] */ 231 reserved_4b:8; /* [31:24] */ 232 volatile 233 uint32_t l_sig_rate:4, /*[3:0] */ 234 l_sig_rate_select:1, /* [4] */ 235 l_sig_length:12, /* [16:5] */ 236 l_sig_parity:1, /* [17] */ 237 l_sig_tail:6, /* [23:18] */ 238 preamble_type:8; /* [31:24] */ 239 volatile 240 uint32_t ht_sig_vht_sig_ah_sig_a_1:24, /* [23:0] */ 241 captured_implicit_sounding:1, /* [24] */ 242 reserved_6:7; /* [31:25] */ 243 volatile 244 uint32_t ht_sig_vht_sig_ah_sig_a_2:24, /* [23:0] */ 245 reserved_7:8; /* [31:24] */ 246 volatile uint32_t vht_sig_b:32; /* [31:0] */ 247 volatile 248 uint32_t service:16, /* [15:0] */ 249 reserved_9:16; /* [31:16] */ 250 }; 251 252 #define VHT_SIG_A_1(rx_desc) ((rx_desc)->ppdu_start.ht_sig_vht_sig_ah_sig_a_1) 253 #define VHT_SIG_A_2(rx_desc) ((rx_desc)->ppdu_start.ht_sig_vht_sig_ah_sig_a_2) 254 #define TSF_TIMESTAMP(rx_desc) \ 255 ((rx_desc)->ppdu_end.rx_pkt_end.phy_timestamp_1_lower_32) 256 257 struct rx_location_info { 258 volatile 259 uint32_t rtt_fac_legacy:14, /* [13:0] */ 260 rtt_fac_legacy_status:1, /* [14] */ 261 rtt_fac_vht:14, /* [28:15] */ 262 rtt_fac_vht_status:1, /* [29] */ 263 rtt_cfr_status:1, /* [30] */ 264 rtt_cir_status:1; /* [31] */ 265 volatile 266 uint32_t rtt_fac_sifs:10, /* [9:0] */ 267 rtt_fac_sifs_status:2, /* [11:10] */ 268 rtt_channel_dump_size:11, /* [22:12] */ 269 rtt_mac_phy_phase:2, /* [24:23] */ 270 rtt_hw_ifft_mode:1, /* [25] */ 271 rtt_btcf_status:1, /* [26] */ 272 rtt_preamble_type:2, /* [28:27] */ 273 rtt_pkt_bw:2, /* [30:29] */ 274 rtt_gi_type:1; /* [31] */ 275 volatile 276 uint32_t rtt_mcs_rate:4, /* [3:0] */ 277 rtt_strongest_chain:2, /* [5:4] */ 278 rtt_phase_jump:7, /* [12:6] */ 279 rtt_rx_chain_mask:4, /* [16:13] */ 280 rtt_tx_data_start_x_phase:1, /* [17] */ 281 reserved_2:13, /* [30:18] */ 282 rx_location_info_valid:1; /* [31] */ 283 }; 284 285 struct rx_pkt_end { 286 volatile 287 uint32_t rx_success:1, /* [0] */ 288 reserved_0a:2, /* [2:1] */ 289 error_tx_interrupt_rx:1, /* [3] */ 290 error_ofdm_power_drop:1, /* [4] */ 291 error_ofdm_restart:1, /* [5] */ 292 error_cck_power_drop:1, /* [6] */ 293 error_cck_restart:1, /* [7] */ 294 reserved_0b:24; /* [31:8] */ 295 volatile uint32_t phy_timestamp_1_lower_32:32; /* [31:0] */ 296 volatile uint32_t phy_timestamp_1_upper_32:32; /* [31:0] */ 297 volatile uint32_t phy_timestamp_2_lower_32:32; /* [31:0] */ 298 volatile uint32_t phy_timestamp_2_upper_32:32; /* [31:0] */ 299 struct rx_location_info rx_location_info; 300 }; 301 302 struct rx_phy_ppdu_end { 303 volatile 304 uint32_t reserved_0a:2, /* [1:0] */ 305 error_radar:1, /* [2] */ 306 error_rx_abort:1, /* [3] */ 307 error_rx_nap:1, /* [4] */ 308 error_ofdm_timing:1, /* [5] */ 309 error_ofdm_signal_parity:1, /* [6] */ 310 error_ofdm_rate_illegal:1, /* [7] */ 311 error_ofdm_length_illegal:1, /* [8] */ 312 error_ppdu_ofdm_restart:1, /* [9] */ 313 error_ofdm_service:1, /* [10] */ 314 error_ppdu_ofdm_power_drop:1, /* [11] */ 315 error_cck_blocker:1, /* [12] */ 316 error_cck_timing:1, /* [13] */ 317 error_cck_header_crc:1, /* [14] */ 318 error_cck_rate_illegal:1, /* [15] */ 319 error_cck_length_illegal:1, /* [16] */ 320 error_ppdu_cck_restart:1, /* [17] */ 321 error_cck_service:1, /* [18] */ 322 error_ppdu_cck_power_drop:1, /* [19] */ 323 error_ht_crc_err:1, /* [20] */ 324 error_ht_length_illegal:1, /* [21] */ 325 error_ht_rate_illegal:1, /* [22] */ 326 error_ht_zlf:1, /* [23] */ 327 error_false_radar_ext:1, /* [24] */ 328 error_green_field:1, /* [25] */ 329 error_spectral_scan:1, /* [26] */ 330 error_rx_bw_gt_dyn_bw:1, /* [27] */ 331 error_leg_ht_mismatch:1, /* [28] */ 332 error_vht_crc_error:1, /* [29] */ 333 error_vht_siga_unsupported:1, /* [30] */ 334 error_vht_lsig_len_invalid:1; /* [31] */ 335 volatile 336 uint32_t error_vht_ndp_or_zlf:1, /* [0] */ 337 error_vht_nsym_lt_zero:1, /* [1] */ 338 error_vht_rx_extra_symbol_mismatch:1, /* [2] */ 339 error_vht_rx_skip_group_id0:1, /* [3] */ 340 error_vht_rx_skip_group_id1to62:1, /* [4] */ 341 error_vht_rx_skip_group_id63:1, /* [5] */ 342 error_ofdm_ldpc_decoder_disabled:1, /* [6] */ 343 error_defer_nap:1, /* [7] */ 344 error_fdomain_timeout:1, /* [8] */ 345 error_lsig_rel_check:1, /* [9] */ 346 error_bt_collision:1, /* [10] */ 347 error_unsupported_mu_feedback:1, /* [11] */ 348 error_ppdu_tx_interrupt_rx:1, /* [12] */ 349 error_rx_unsupported_cbf:1, /* [13] */ 350 reserved_1:18; /* [31:14] */ 351 }; 352 353 struct rx_timing_offset { 354 volatile 355 uint32_t timing_offset:12, /* [11:0] */ 356 reserved:20; /* [31:12] */ 357 }; 358 359 struct rx_ppdu_end { 360 volatile uint32_t evm_p0:32; 361 volatile uint32_t evm_p1:32; 362 volatile uint32_t evm_p2:32; 363 volatile uint32_t evm_p3:32; 364 volatile uint32_t evm_p4:32; 365 volatile uint32_t evm_p5:32; 366 volatile uint32_t evm_p6:32; 367 volatile uint32_t evm_p7:32; 368 volatile uint32_t evm_p8:32; 369 volatile uint32_t evm_p9:32; 370 volatile uint32_t evm_p10:32; 371 volatile uint32_t evm_p11:32; 372 volatile uint32_t evm_p12:32; 373 volatile uint32_t evm_p13:32; 374 volatile uint32_t evm_p14:32; 375 volatile uint32_t evm_p15:32; 376 volatile uint32_t reserved_16:32; 377 volatile uint32_t reserved_17:32; 378 volatile uint32_t wb_timestamp_lower_32:32; 379 volatile uint32_t wb_timestamp_upper_32:32; 380 struct rx_pkt_end rx_pkt_end; 381 struct rx_phy_ppdu_end rx_phy_ppdu_end; 382 struct rx_timing_offset rx_timing_offset; 383 volatile 384 uint32_t rx_antenna:24, /* [23:0] */ 385 tx_ht_vht_ack:1, /* [24] */ 386 rx_pkt_end_valid:1, /* [25] */ 387 rx_phy_ppdu_end_valid:1, /* [26] */ 388 rx_timing_offset_valid:1, /* [27] */ 389 bb_captured_channel:1, /* [28] */ 390 unsupported_mu_nc:1, /* [29] */ 391 otp_txbf_disable:1, /* [30] */ 392 reserved_31:1; /* [31] */ 393 volatile 394 uint32_t coex_bt_tx_from_start_of_rx:1, /* [0] */ 395 coex_bt_tx_after_start_of_rx:1, /* [1] */ 396 coex_wan_tx_from_start_of_rx:1, /* [2] */ 397 coex_wan_tx_after_start_of_rx:1, /* [3] */ 398 coex_wlan_tx_from_start_of_rx:1, /* [4] */ 399 coex_wlan_tx_after_start_of_rx:1, /* [5] */ 400 mpdu_delimiter_errors_seen:1, /* [6] */ 401 ftm:1, /* [7] */ 402 ftm_dialog_token:8, /* [15:8] */ 403 ftm_follow_up_dialog_token:8, /* [23:16] */ 404 reserved_32:8; /* [31:24] */ 405 volatile 406 uint32_t before_mpdu_cnt_passing_fcs:8, /* [7:0] */ 407 before_mpdu_cnt_failing_fcs:8, /* [15:8] */ 408 after_mpdu_cnt_passing_fcs:8, /* [23:16] */ 409 after_mpdu_cnt_failing_fcs:8; /* [31:24] */ 410 volatile uint32_t phy_timestamp_tx_lower_32:32; /* [31:0] */ 411 volatile uint32_t phy_timestamp_tx_upper_32:32; /* [31:0] */ 412 volatile 413 uint32_t bb_length:16, /* [15:0] */ 414 bb_data:1, /* [16] */ 415 peer_idx_valid:1, /* [17] */ 416 peer_idx:11, /* [28:18] */ 417 reserved_26:2, /* [30:29] */ 418 ppdu_done:1; /* [31] */ 419 }; 420 #else 421 struct rx_ppdu_start { 422 volatile 423 uint32_t rssi_chain0_pri20:8, /* [7:0] */ 424 rssi_chain0_sec20:8, /* [15:8] */ 425 rssi_chain0_sec40:8, /* [23:16] */ 426 rssi_chain0_sec80:8; /* [31:24] */ 427 volatile 428 uint32_t rssi_chain1_pri20:8, /* [7:0] */ 429 rssi_chain1_sec20:8, /* [15:8] */ 430 rssi_chain1_sec40:8, /* [23:16] */ 431 rssi_chain1_sec80:8; /* [31:24] */ 432 volatile 433 uint32_t rssi_chain2_pri20:8, /* [7:0] */ 434 rssi_chain2_sec20:8, /* [15:8] */ 435 rssi_chain2_sec40:8, /* [23:16] */ 436 rssi_chain2_sec80:8; /* [31:24] */ 437 volatile 438 uint32_t rssi_chain3_pri20:8, /* [7:0] */ 439 rssi_chain3_sec20:8, /* [15:8] */ 440 rssi_chain3_sec40:8, /* [23:16] */ 441 rssi_chain3_sec80:8; /* [31:24] */ 442 volatile 443 uint32_t rssi_comb:8, /* [7:0] */ 444 reserved_4a:16, /* [23:8] */ 445 is_greenfield:1, /* [24] */ 446 reserved_4b:7; /* [31:25] */ 447 volatile 448 uint32_t l_sig_rate:4, /* [3:0] */ 449 l_sig_rate_select:1, /* [4] */ 450 l_sig_length:12, /* [16:5] */ 451 l_sig_parity:1, /* [17] */ 452 l_sig_tail:6, /* [23:18] */ 453 preamble_type:8; /* [31:24] */ 454 volatile 455 uint32_t ht_sig_vht_sig_a_1:24, /* [23:0] */ 456 reserved_6:8; /* [31:24] */ 457 volatile 458 uint32_t ht_sig_vht_sig_a_2:24, /* [23:0] */ 459 txbf_h_info:1, /* [24] */ 460 reserved_7:7; /* [31:25] */ 461 volatile 462 uint32_t vht_sig_b:29, /* [28:0] */ 463 reserved_8:3; /* [31:29] */ 464 volatile 465 uint32_t service:16, /* [15:0] */ 466 reserved_9:16; /* [31:16] */ 467 }; 468 469 #define VHT_SIG_A_1(rx_desc) ((rx_desc)->ppdu_start.ht_sig_vht_sig_a_1) 470 #define VHT_SIG_A_2(rx_desc) ((rx_desc)->ppdu_start.ht_sig_vht_sig_a_2) 471 472 #define TSF_TIMESTAMP(rx_desc) ((rx_desc)->ppdu_end.tsf_timestamp) 473 474 struct rx_mpdu_start { 475 volatile 476 uint32_t peer_idx:11, /* [10:0] */ 477 fr_ds:1, /* [11] */ 478 to_ds:1, /* [12] */ 479 encrypted:1, /* [13] */ 480 retry:1, /* [14] */ 481 txbf_h_info:1, /* [15] */ 482 seq_num:12, /* [27:16] */ 483 encrypt_type:4; /* [31:28] */ 484 volatile uint32_t pn_31_0:32; /* [31:0] */ 485 volatile 486 uint32_t pn_47_32:16, /* [15:0] */ 487 directed:1, /* [16] */ 488 reserved_2:11, /* [27:17] */ 489 tid:4; /* [31:28] */ 490 }; 491 492 struct rx_ppdu_end { 493 volatile uint32_t evm_p0:32; /* [31:0] */ 494 volatile uint32_t evm_p1:32; /* [31:0] */ 495 volatile uint32_t evm_p2:32; /* [31:0] */ 496 volatile uint32_t evm_p3:32; /* [31:0] */ 497 volatile uint32_t evm_p4:32; /* [31:0] */ 498 volatile uint32_t evm_p5:32; /* [31:0] */ 499 volatile uint32_t evm_p6:32; /* [31:0] */ 500 volatile uint32_t evm_p7:32; /* [31:0] */ 501 volatile uint32_t evm_p8:32; /* [31:0] */ 502 volatile uint32_t evm_p9:32; /* [31:0] */ 503 volatile uint32_t evm_p10:32; /* [31:0] */ 504 volatile uint32_t evm_p11:32; /* [31:0] */ 505 volatile uint32_t evm_p12:32; /* [31:0] */ 506 volatile uint32_t evm_p13:32; /* [31:0] */ 507 volatile uint32_t evm_p14:32; /* [31:0] */ 508 volatile uint32_t evm_p15:32; /* [31:0] */ 509 volatile uint32_t tsf_timestamp:32; /* [31:0] */ 510 volatile uint32_t wb_timestamp:32; /* [31:0] */ 511 volatile 512 uint32_t locationing_timestamp:8, /* [7:0] */ 513 phy_err_code:8, /* [15:8] */ 514 phy_err:1, /* [16] */ 515 rx_location:1, /* [17] */ 516 txbf_h_info:1, /* [18] */ 517 reserved_18:13; /* [31:19] */ 518 volatile 519 uint32_t rx_antenna:24, /* [23:0] */ 520 tx_ht_vht_ack:1, /* [24] */ 521 bb_captured_channel:1, /* [25] */ 522 reserved_19:6; /* [31:26] */ 523 volatile 524 uint32_t rtt_correction_value:24, /* [23:0] */ 525 reserved_20:7, /* [30:24] */ 526 rtt_normal_mode:1; /* [31] */ 527 volatile 528 uint32_t bb_length:16, /* [15:0] */ 529 reserved_21:15, /* [30:16] */ 530 ppdu_done:1; /* [31] */ 531 }; 532 #endif /* defined(HELIUMPLUS) */ 533 534 #endif /*_RX_DESC_H_*/ 535