Searched refs:BIT6 (Results 1 – 3 of 3) sorted by relevance
299 #define IRQ_EXITHUNT BIT6 // receive frame start300 #define IRQ_RXTIME BIT6 // rx char timeout307 #define XFW BIT6 // transmit FIFO write enable679 #define CMD_RXRESET BIT6 // receiver reset927 if (status & (BIT7 + BIT6)) { in rx_ready_async()941 else if (status & BIT6) in rx_ready_async()1476 info->read_status_mask |= BIT7 | BIT6; in mgslpc_change_params()1478 info->ignore_status_mask |= BIT7 | BIT6; in mgslpc_change_params()2184 set_reg_bits(info, CHA+DAFO, BIT6); in mgslpc_break()2186 clear_reg_bits(info, CHA+DAFO, BIT6); in mgslpc_break()[all …]
25 #define BIT6 0x0040 macro
75 #define BIT6 64 macro