Searched refs:IMX7D_DRAM_PHYM_ROOT_CLK (Results 1 – 2 of 2) sorted by relevance
107 #define IMX7D_DRAM_PHYM_ROOT_CLK 94 macro
385 IMX7D_DRAM_PHYM_ROOT_CLK, IMX7D_DRAM_ROOT_CLK,796 …clks[IMX7D_DRAM_PHYM_ROOT_CLK] = imx_clk_gate4("dram_phym_root_clk", "dram_phym_cg", base + 0x4130… in imx7d_clocks_init()