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Searched refs:PLLE_BASE_DIVCML_SHIFT (Results 1 – 1 of 1) sorted by relevance

/linux-4.19.296/drivers/clk/tegra/
Dclk-pll.c60 #define PLLE_BASE_DIVCML_SHIFT 24 macro
968 val &= ~(PLLE_BASE_DIVCML_MASK << PLLE_BASE_DIVCML_SHIFT); in clk_plle_enable()
972 val |= sel.cpcon << PLLE_BASE_DIVCML_SHIFT; in clk_plle_enable()
1604 val &= ~(PLLE_BASE_DIVCML_MASK << PLLE_BASE_DIVCML_SHIFT); in clk_plle_tegra114_enable()
1607 val |= sel.cpcon << PLLE_BASE_DIVCML_SHIFT; in clk_plle_tegra114_enable()
2422 val &= ~(PLLE_BASE_DIVCML_MASK << PLLE_BASE_DIVCML_SHIFT); in clk_plle_tegra210_enable()
2425 val |= sel.cpcon << PLLE_BASE_DIVCML_SHIFT; in clk_plle_tegra210_enable()