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Searched refs:SATA_PLL_CFG0_SATA_SEQ_PADPLL_PD_INPUT_VALUE (Results 1 – 1 of 1) sorted by relevance

/linux-4.19.296/drivers/clk/tegra/
Dclk-tegra210.c193 #define SATA_PLL_CFG0_SATA_SEQ_PADPLL_PD_INPUT_VALUE BIT(7) macro
551 val |= SATA_PLL_CFG0_SATA_SEQ_PADPLL_PD_INPUT_VALUE; in tegra210_set_sata_pll_seq_sw()
556 val &= ~SATA_PLL_CFG0_SATA_SEQ_PADPLL_PD_INPUT_VALUE; in tegra210_set_sata_pll_seq_sw()