pcw_shift (reference) in projects: linux-4.19.296

140 	val &= ~GENMASK(pll->data->pcw_shift + pll->data->pcwbits - 1,  in mtk_pll_set_rate_regs()
141 			pll->data->pcw_shift);  in mtk_pll_set_rate_regs()
142 	val |= pcw << pll->data->pcw_shift;  in mtk_pll_set_rate_regs()
228 	pcw = readl(pll->pcw_addr) >> pll->data->pcw_shift;  in mtk_pll_recalc_rate()

D

clk-mt8135.c

618 		.pcw_shift = _pcw_shift,				\

D

clk-mt7622.c

48 		.pcw_shift = _pcw_shift,				\

D

clk-mt2712.c

1189 		.pcw_shift = _pcw_shift,				\

/linux-4.19.296/drivers/clk/mediatek/
D	clk-pll.c	`140 val &= ~GENMASK(pll->data->pcw_shift + pll->data->pcwbits - 1, in mtk_pll_set_rate_regs() 141 pll->data->pcw_shift); in mtk_pll_set_rate_regs() 142 val \|= pcw << pll->data->pcw_shift; in mtk_pll_set_rate_regs() 228 pcw = readl(pll->pcw_addr) >> pll->data->pcw_shift; in mtk_pll_recalc_rate()`
D	clk-mtk.h	`220 int pcw_shift; member`
D	clk-mt8135.c	`618 .pcw_shift = _pcw_shift, \`
D	clk-mt6797.c	`620 .pcw_shift = _pcw_shift, \`
D	clk-mt7622.c	`48 .pcw_shift = _pcw_shift, \`
D	clk-mt2701.c	`946 .pcw_shift = _pcw_shift, \`
D	clk-mt2712.c	`1189 .pcw_shift = _pcw_shift, \`
D	clk-mt8173.c	`1049 .pcw_shift = _pcw_shift, \`

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